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Mirrored from ggml-org/llama.cpp#17495

Based on the work by @zhang-hui-yulo for RDNA4 I attempted to backport the WMMA MMF support to RDNA3.

The differences to RDNA4 are:

  • RDNA3 has no INT8 support for in WMMA
  • RDNA3 has a different tile size

The results for granite 1b 400m look great:

GPU Model Microbatch size Test t/s master t/s ba25661 Speedup
RX 7900 XT granitemoe ?B F16 1 pp512 283.42 286.08 1.01
RX 7900 XT granitemoe ?B F16 2 pp512 124.99 668.81 5.35
RX 7900 XT granitemoe ?B F16 4 pp512 205.77 1224.45 5.95
RX 7900 XT granitemoe ?B F16 8 pp512 377.29 1881.51 4.99
RX 7900 XT granitemoe ?B F16 16 pp512 640.67 3181.89 4.97
RX 7900 XT granitemoe ?B F16 32 pp512 1024.92 5654.28 5.52
RX 7900 XT granitemoe ?B F16 64 pp512 2052.33 9817.10 4.78
RX 7900 XT granitemoe ?B F16 128 pp512 3622.50 15972.81 4.41
RX 7900 XT granitemoe ?B F16 256 pp512 6007.40 22525.58 3.75
RX 7900 XT granitemoe ?B F16 512 pp512 9174.28 27815.62 3.03

The results for a more realistic GPT-OSS 20b (this is the Q8_0 GGUF) show a very mixed picture:

GPU Model Microbatch size Test t/s master t/s ba25661 Speedup
RX 7900 XT gpt-oss 20B Q8_0 1 pp512 185.38 184.65 1.00
RX 7900 XT gpt-oss 20B Q8_0 2 pp512 194.19 149.07 0.77
RX 7900 XT gpt-oss 20B Q8_0 4 pp512 330.51 252.03 0.76
RX 7900 XT gpt-oss 20B Q8_0 8 pp512 533.63 388.62 0.73
RX 7900 XT gpt-oss 20B Q8_0 16 pp512 681.33 468.21 0.69
RX 7900 XT gpt-oss 20B Q8_0 32 pp512 891.99 775.13 0.87
RX 7900 XT gpt-oss 20B Q8_0 64 pp512 1100.87 1201.82 1.09
RX 7900 XT gpt-oss 20B Q8_0 128 pp512 1726.52 1805.08 1.05
RX 7900 XT gpt-oss 20B Q8_0 256 pp512 2543.29 2602.84 1.02
RX 7900 XT gpt-oss 20B Q8_0 512 pp512 3289.95 3347.58 1.02

Help appreciated. I'm a novice when it comes to HIP and GPU intrinsics.

CC @jiachengjason

zhang hui and others added 20 commits November 7, 2025 21:22
  Key Changes Made:

  1. ggml/src/ggml-cuda/common.cuh:
    - Extended AMD_WMMA_AVAILABLE macro to include both RDNA3 and RDNA4
    - Updated amd_wmma_available() to return true for both architectures
  2. ggml/src/ggml-cuda/mma.cuh:
    - Tile structures: Added RDNA3-specific tile sizes:
        - RDNA4: 4 half2 = 8 FP16 elements (compact layout)
      - RDNA3: 8 half2 = 16 FP16 elements (duplicate layout required by hardware)
    - MMA operations: Added RDNA3 intrinsics:
        - FP16: __builtin_amdgcn_wmma_f32_16x16x16_f16_w32 (no gfx12 suffix)
      - BF16: __builtin_amdgcn_wmma_f32_16x16x16_bf16_w32
      - Uses halfx16_t/bf16x16_t for RDNA3 vs halfx8_t/bf16x8_t for RDNA4
    - Load operations: Added conditional handling for 32-byte RDNA3 tiles using two 16-byte copies
  3. ggml/src/ggml-cuda/mmf.cu:
    - Updated to use amd_wmma_available() for both RDNA3 and RDNA4
@loci-agentic-ai
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Explore the complete analysis inside the Version Insights

Performance Analysis Summary: PR #319 - HIP RDNA3 WMMA Support

Overview

This PR introduces WMMA (Wave Matrix Multiply-Accumulate) support for AMD RDNA3 GPUs (RX 7000 series), backporting functionality from RDNA4. The changes modify 4 files in the GGML CUDA backend, adding architecture-specific code paths for FP16 and BF16 matrix operations while restricting unsupported integer WMMA operations on RDNA3.

Performance analysis shows 0.0% power consumption change across all 16 binaries, indicating the modifications are properly isolated to RDNA3-specific code paths with no impact on other architectures or CPU-based inference.

Key Findings

Performance-Critical Areas Impact:

The changes target the GGML Backend System, specifically matrix multiplication kernels used during model inference. No functions show measurable response time or throughput changes in the static analysis, as modifications are architecture-specific (RDNA3 only) and do not affect the baseline x86_64 CPU execution path.

Inference Performance:

Core inference functions (llama_decode, llama_encode, llama_tokenize) show no response time or throughput changes. The tokens per second metric remains unaffected for CPU-based inference on the reference platform (12th Gen Intel Core i7-1255U). RDNA3 GPU users may experience improved tokens per second for FP16/BF16 models, but this is hardware-specific and not reflected in the CPU baseline measurements.

Power Consumption:

All binaries maintain identical power consumption between versions:

  • build.bin.libllama.so: 228,844.69 nJ (baseline: 228,844.64 nJ)
  • build.bin.llama-run: 245,370.16 nJ (baseline: 245,370.17 nJ)
  • build.bin.llama-tts: 285,154.74 nJ (baseline: 285,154.49 nJ)

Sub-nanojoule variations are within measurement precision and represent no functional change.

Code Changes:

The implementation adds compile-time conditionals and runtime detection for RDNA3 WMMA capabilities, adjusts tile sizes from 8 to 16 FP16 elements to match RDNA3 hardware specifications, and restricts integer WMMA to RDNA4 only. These changes enable hardware acceleration for RDNA3 GPUs without modifying non-AMD code paths, maintaining zero performance impact on CPU and NVIDIA GPU execution.

@loci-dev loci-dev force-pushed the main branch 7 times, most recently from 92ef8cd to 7dd50b8 Compare November 26, 2025 16:10
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3 participants