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Mel-ChenMel-Chen
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[LV][NFC] Auto-generate the test cases related to FindLastIV idioms. (llvm#117560)
Pre-commit for llvm#67812
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‎llvm/test/Transforms/LoopVectorize/iv-select-cmp-no-wrap.ll‎

Lines changed: 77 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,26 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S < %s | FileCheck %s --check-prefix=CHECK
23

34
define i64 @select_icmp_nuw_nsw(ptr %a, ptr %b, i64 %ii, i64 %n) {
4-
; CHECK-LABEL: define i64 @select_icmp_nuw_nsw
5-
; CHECK-NOT: vector.body:
5+
; CHECK-LABEL: define i64 @select_icmp_nuw_nsw(
6+
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) {
7+
; CHECK-NEXT: [[ENTRY:.*]]:
8+
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
9+
; CHECK: [[FOR_BODY]]:
10+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ 0, %[[ENTRY]] ]
11+
; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[II]], %[[ENTRY]] ]
12+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]
13+
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
14+
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]
15+
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8
16+
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]]
17+
; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]]
18+
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[IV]], 1
19+
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]]
20+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[FOR_BODY]]
21+
; CHECK: [[EXIT]]:
22+
; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ]
23+
; CHECK-NEXT: ret i64 [[COND_LCSSA]]
624
;
725
entry:
826
br label %for.body
@@ -25,8 +43,25 @@ exit: ; preds = %for.body
2543
}
2644

2745
define i64 @select_icmp_nsw(ptr %a, ptr %b, i64 %ii, i64 %n) {
28-
; CHECK-LABEL: define i64 @select_icmp_nsw
29-
; CHECK-NOT: vector.body:
46+
; CHECK-LABEL: define i64 @select_icmp_nsw(
47+
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) {
48+
; CHECK-NEXT: [[ENTRY:.*]]:
49+
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
50+
; CHECK: [[FOR_BODY]]:
51+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ 0, %[[ENTRY]] ]
52+
; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[II]], %[[ENTRY]] ]
53+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]
54+
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
55+
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]
56+
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8
57+
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]]
58+
; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]]
59+
; CHECK-NEXT: [[INC]] = add nsw i64 [[IV]], 1
60+
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]]
61+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[FOR_BODY]]
62+
; CHECK: [[EXIT]]:
63+
; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ]
64+
; CHECK-NEXT: ret i64 [[COND_LCSSA]]
3065
;
3166
entry:
3267
br label %for.body
@@ -49,8 +84,25 @@ exit: ; preds = %for.body
4984
}
5085

5186
define i64 @select_icmp_nuw(ptr %a, ptr %b, i64 %ii, i64 %n) {
52-
; CHECK-LABEL: define i64 @select_icmp_nuw
53-
; CHECK-NOT: vector.body:
87+
; CHECK-LABEL: define i64 @select_icmp_nuw(
88+
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) {
89+
; CHECK-NEXT: [[ENTRY:.*]]:
90+
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
91+
; CHECK: [[FOR_BODY]]:
92+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ 0, %[[ENTRY]] ]
93+
; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[II]], %[[ENTRY]] ]
94+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]
95+
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
96+
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]
97+
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8
98+
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]]
99+
; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]]
100+
; CHECK-NEXT: [[INC]] = add nuw i64 [[IV]], 1
101+
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]]
102+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[FOR_BODY]]
103+
; CHECK: [[EXIT]]:
104+
; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ]
105+
; CHECK-NEXT: ret i64 [[COND_LCSSA]]
54106
;
55107
entry:
56108
br label %for.body
@@ -73,8 +125,25 @@ exit: ; preds = %for.body
73125
}
74126

75127
define i64 @select_icmp_noflag(ptr %a, ptr %b, i64 %ii, i64 %n) {
76-
; CHECK-LABEL: define i64 @select_icmp_noflag
77-
; CHECK-NOT: vector.body:
128+
; CHECK-LABEL: define i64 @select_icmp_noflag(
129+
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[II:%.*]], i64 [[N:%.*]]) {
130+
; CHECK-NEXT: [[ENTRY:.*]]:
131+
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
132+
; CHECK: [[FOR_BODY]]:
133+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ 0, %[[ENTRY]] ]
134+
; CHECK-NEXT: [[RDX:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[II]], %[[ENTRY]] ]
135+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]]
136+
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
137+
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, ptr [[B]], i64 [[IV]]
138+
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8
139+
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[TMP0]], [[TMP1]]
140+
; CHECK-NEXT: [[COND]] = select i1 [[CMP2]], i64 [[IV]], i64 [[RDX]]
141+
; CHECK-NEXT: [[INC]] = add i64 [[IV]], 1
142+
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]]
143+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[FOR_BODY]]
144+
; CHECK: [[EXIT]]:
145+
; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ]
146+
; CHECK-NEXT: ret i64 [[COND_LCSSA]]
78147
;
79148
entry:
80149
br label %for.body

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