ref: Add missing default cases to switchs

Switch statements without a default case cause errors with the
-Wswitch-default flag.

Signed-off-by: Miguel Silva <[email protected]>

Author: miguelafsilva5

src/arch/armv8/cache.c

@@ -42,6 +42,9 @@ void cache_arch_enumerate(struct cache* dscrp)
                 case CLIDR_CTYPE_UN:
                     dscrp->type[i] = UNIFIED;
                     break;
+                default:
+                    dscrp->type[i] = UNIFIED;
+                    break;
             }
         } else {
             break;

src/arch/armv8/inc/arch/gicv3.h

@@ -107,6 +107,8 @@ static inline void gich_write_lr(size_t i, uint64_t val)
         case 15:
             sysreg_ich_lr15_el2_write(val);
             break;
+        default:
+            break;
     }
 }
 

src/arch/armv8/psci.c

@@ -42,6 +42,9 @@ static void psci_cpumsg_handler(uint32_t event, uint64_t data)
         case PSCI_MSG_ON:
             psci_wake_from_off();
             break;
+        default:
+            WARNING("Unknown PSCI IPI event");
+            break;
     }
 }
 
@@ -176,6 +179,9 @@ static int32_t psci_features_handler(uint32_t feature_id)
         case PSCI_FEATURES:
             ret = PSCI_E_SUCCESS;
             break;
+        default:
+            ret = PSCI_E_NOT_SUPPORTED;
+            break;
     }
 
     return ret;

src/arch/armv8/vgic.c

@@ -432,6 +432,9 @@ static void vgicd_emul_misc_access(struct emul_access* acc, struct vgic_reg_hand
                 vcpu_writereg(cpu()->vcpu, acc->reg, vgicd->IIDR);
             }
             break;
+        default:
+            vgic_emul_razwi(acc, handlers, gicr_access, vgicr_id);
+            break;
     }
 }
 
@@ -1042,6 +1045,10 @@ void vgic_ipi_handler(uint32_t event, uint64_t data)
                 vgic_int_set_field(handlers, cpu()->vcpu, interrupt, (unsigned long)val);
             }
         } break;
+
+        default:
+            WARNING("Unknown VGIC IPI event");
+            break;
     }
 }
 

src/arch/armv8/vgicv2.c

@@ -81,7 +81,7 @@ static void vgicd_emul_sgiregs_access(struct emul_access* acc,
                 case 2:
                     trgtlist = (1U << cpu()->id);
                     break;
-                case 3:
+                default:
                     return;
             }
 

src/arch/riscv/irqc/aia/vaplic.c

@@ -277,6 +277,9 @@ static void vaplic_ipi_handler(uint32_t event, uint64_t data)
         case UPDATE_HART_LINE:
             vaplic_update_hart(cpu()->vcpu, (size_t)data);
             break;
+        default:
+            WARNING("Unknown VAPLIC IPI event");
+            break;
     }
 }
 

src/arch/riscv/irqc/plic/vplic.c

@@ -144,6 +144,9 @@ static void vplic_ipi_handler(uint32_t event, uint64_t data)
         case UPDATE_HART_LINE:
             vplic_update_hart_line(cpu()->vcpu, data);
             break;
+        default:
+            WARNING("Unknown VPLIC IPI event");
+            break;
     }
 }
 
@@ -356,6 +359,11 @@ static bool vplic_hart_emul_handler(struct emul_access* acc)
                 vcpu_writereg(cpu()->vcpu, acc->reg, vplic_claim(cpu()->vcpu, vcntxt));
             }
             break;
+        default:
+            if (!acc->write) {
+                vcpu_writereg(cpu()->vcpu, acc->reg, 0);
+            }
+            break;
     }
 
     return true;

src/core/ipc.c

@@ -62,6 +62,9 @@ static void ipc_handler(uint32_t event, uint64_t data)
         case IPC_NOTIFY:
             ipc_notify(ipc_data.shmem_id, ipc_data.event_id);
             break;
+        default:
+            WARNING("Unknown IPC IPI event");
+            break;
     }
 }
 CPU_MSG_HANDLER(ipc_handler, IPC_CPUMSG_ID)
@@ -116,7 +119,7 @@ static void ipc_alloc_shmem()
     }
 }
 
-void ipc_init()
+void ipc_init(void)
 {
     if (cpu_is_master()) {
         shmem_table_size = config.shmemlist_size;