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fix(riscv/irqc): align IMSIC handler to AIA specifications #209

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5b11dc3
feat(riscv/csr): add logical CSR swap to CSR accessors
filippofontana Apr 4, 2025
a6c0c1b
fix(riscv/irqc): align IMSIC handler to AIA specifications
filippofontana Apr 4, 2025
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43 changes: 25 additions & 18 deletions src/arch/riscv/inc/arch/csrs.h
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Original file line number Diff line number Diff line change
Expand Up @@ -228,24 +228,31 @@

#ifndef __ASSEMBLER__

#define CSRS_GEN_ACCESSORS_NAMED(csr_name, csr_id) \
static inline unsigned long csrs_##csr_name##_read(void) \
{ \
unsigned long csr_value; \
__asm__ volatile("csrr %0," XSTR(csr_id) : "=r"(csr_value)::"memory"); \
return csr_value; \
} \
static inline void csrs_##csr_name##_write(unsigned long csr_value) \
{ \
__asm__ volatile("csrw " XSTR(csr_id) ",%0" ::"r"(csr_value) : "memory"); \
} \
static inline void csrs_##csr_name##_set(unsigned long csr_value) \
{ \
__asm__ volatile("csrs " XSTR(csr_id) ",%0" ::"r"(csr_value) : "memory"); \
} \
static inline void csrs_##csr_name##_clear(unsigned long csr_value) \
{ \
__asm__ volatile("csrc " XSTR(csr_id) ",%0" ::"r"(csr_value) : "memory"); \
#define CSRS_GEN_ACCESSORS_NAMED(csr_name, csr_id) \
static inline unsigned long csrs_##csr_name##_read(void) \
{ \
unsigned long csr_value; \
__asm__ volatile("csrr %0," XSTR(csr_id) : "=r"(csr_value)::"memory"); \
return csr_value; \
} \
static inline void csrs_##csr_name##_write(unsigned long csr_value) \
{ \
__asm__ volatile("csrw " XSTR(csr_id) ",%0" ::"r"(csr_value) : "memory"); \
} \
static inline void csrs_##csr_name##_set(unsigned long csr_value) \
{ \
__asm__ volatile("csrs " XSTR(csr_id) ",%0" ::"r"(csr_value) : "memory"); \
} \
static inline void csrs_##csr_name##_clear(unsigned long csr_value) \
{ \
__asm__ volatile("csrc " XSTR(csr_id) ",%0" ::"r"(csr_value) : "memory"); \
} \
static inline unsigned long csrs_##csr_name##_swap(unsigned long csr_value) \
{ \
unsigned long reg_val; \
__asm__ volatile("csrrw %0," XSTR(csr_id) ",%1" : "=r"(reg_val) : "rK"(csr_value) \
: "memory"); \
return reg_val; \
}

#define CSRS_GEN_ACCESSORS(csr) CSRS_GEN_ACCESSORS_NAMED(csr, csr)
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9 changes: 3 additions & 6 deletions src/arch/riscv/irqc/aia/imsic.c
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Original file line number Diff line number Diff line change
Expand Up @@ -87,14 +87,11 @@ void imsic_send_msi(cpuid_t target_cpu, irqid_t ipi_id)

void imsic_handle(void)
{
uint32_t intp_identity = (uint32_t)(csrs_stopei_read() >> STOPEI_EEID);
/* Read STOPEI and write to it to claim the interrupt */
uint32_t intp_identity = (uint32_t)(csrs_stopei_swap(0) >> STOPEI_EEID);

if (intp_identity != 0) {
enum irq_res res = interrupts_handle(intp_identity);
if (res == HANDLED_BY_HYP) {
/* Write to STOPEI to clear the interrupt */
csrs_stopei_write(0);
}
interrupts_handle(intp_identity);
};
}

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