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4 changes: 2 additions & 2 deletions src/arch/armv8/aarch32/boot.S
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@
add \rd, \rd, r1
.endm

.data
.section .datanocopy
.balign 4
/**
* barrier is used to minimal synchronization in boot - other cores wait for bsp to set it.
Expand Down Expand Up @@ -108,7 +108,7 @@ _reset_handler:
* which later will turn on all the others. Therefore, there is no concurrency when setting
* CPU_MASTER and no atomic operations are needed.
*/
.pushsection .data
.pushsection .datanocopy
_master_set:
.4byte 0
.popsection
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2 changes: 1 addition & 1 deletion src/arch/armv8/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
#include <platform.h>
#include <arch/sysregs.h>

cpuid_t CPU_MASTER __attribute__((section(".data")));
cpuid_t CPU_MASTER __attribute__((section(".datanocopy")));

/* Perform architecture dependent cpu cores initializations */
void cpu_arch_init(cpuid_t cpuid, paddr_t load_addr)
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2 changes: 1 addition & 1 deletion src/arch/riscv/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
#include <arch/sbi.h>
#include <platform.h>

cpuid_t CPU_MASTER __attribute__((section(".data")));
cpuid_t CPU_MASTER __attribute__((section(".datanocopy")));

/* Perform architecture dependent cpu cores initializations */
void cpu_arch_init(cpuid_t cpuid, paddr_t load_addr)
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4 changes: 2 additions & 2 deletions src/core/mem.c
Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ extern uint8_t _image_start, _image_load_end, _image_end, _vm_image_start, _vm_i
struct list page_pool_list;

/* The address where the Bao image is loaded in memory */
vaddr_t img_addr __attribute__((section(".data")));
vaddr_t img_addr __attribute__((section(".datanocopy")));
/* The address where the data section is loaded in memory */
vaddr_t data_addr __attribute__((section(".data")));
vaddr_t data_addr __attribute__((section(".datanocopy")));

static bool pp_bitmap_alloc(size_t pool_num_pages, bitmap_t** bitmap)
{
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21 changes: 12 additions & 9 deletions src/linker.ld
Original file line number Diff line number Diff line change
Expand Up @@ -56,22 +56,25 @@ SECTIONS
_ipi_cpumsg_handlers_id_end = .;
}

.pad_load : {
_image_load_end = .;

.datanocopy : ALIGN(PAGE_SIZE) {
/**
* This section holds data initialized and used during early stages of the boot that can't
* be later rewritten during the copy of data sections from non-volatile memory
*/
*(.datanocopy)
/**
* This section ensures the loadable portion of the image (_image_load_end) is page-aligned
* by adding padding if necessary. The BYTE(0x00) forces this section to be PROGBITS rather
* than NOBITS, ensuring any padding bytes are actually written to the file up to the align
* Ensure the loadable portion of the image (_image_load_end) is page-aligned by adding
* padding if necessary.
*/
BYTE(0x00)
. = ALIGN(PAGE_SIZE);
. = ALIGN(PAGE_SIZE);
}

_image_load_end = .;

#ifdef MEM_NON_UNIFIED
/* Save the current location counter (VMA) and switch to LMA for .vm_images */
_vma_before_vm_images = .;
_image_load_end = _data_lma_start + (_image_load_end - _data_vma_start);
_image_load_end = ALIGN((_data_lma_start + (_image_load_end - _data_vma_start)), PAGE_SIZE);
. = _image_load_end;
#endif

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