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7134956bbogush
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NAND: Timings: Change for samsung chips reads.
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+16
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qt/parallel_chip_info.cpp

Lines changed: 16 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -53,23 +53,24 @@ void ParallelChipInfo::chipInfoToStmParams(StmParams *stmParams)
5353
clrSetupTime;
5454
const double tHCLK = 13.88; /* 1 / 72MHz */
5555
const double tsuD_NOE = 25;
56-
std::array<uint32_t, 5> setupArr = { params[CHIP_PARAM_T_CH],
56+
std::array<uint32_t, 5> setupArr = { params[CHIP_PARAM_T_CS],
5757
params[CHIP_PARAM_T_CLS], params[CHIP_PARAM_T_ALS],
5858
params[CHIP_PARAM_T_CLR], params[CHIP_PARAM_T_AR] };
59-
std::array<uint32_t, 3> hiZArr = { params[CHIP_PARAM_T_CH],
59+
std::array<uint32_t, 3> hiZArr = { params[CHIP_PARAM_T_CS],
6060
params[CHIP_PARAM_T_ALS], params[CHIP_PARAM_T_CLS] };
6161
std::array<uint32_t, 3> holdArr = { params[CHIP_PARAM_T_CH],
6262
params[CHIP_PARAM_T_CLH], params[CHIP_PARAM_T_ALH] };
6363

64-
/* (SET + 1) * tHCLK >= max(tCH, tCLS, tALS, tCLR, tAR) - tWP */
64+
/* (SET + 1) * tHCLK >= max(tCS, tCLS, tALS, tCLR, tAR) - tWP */
6565
setupTime = *std::max_element(setupArr.begin(), setupArr.end()) -
6666
params[CHIP_PARAM_T_WP];
6767
setupTime = setupTime / tHCLK - 1;
68-
setupTime = setupTime <= 0 ? 0 : ceil(setupTime);
68+
/* K9F2G08U0C requires at least 1 tick */
69+
setupTime = setupTime <= 0 ? 1 : ceil(setupTime);
6970
stmParams->setupTime = static_cast<uint8_t>(setupTime);
7071

7172
/* (WAIT + 1) * tHCLK >= max(tWP, tRP) */
72-
waitSetupTime = std::max(params[CHIP_PARAM_T_WP], params[CHIP_PARAM_T_WP]);
73+
waitSetupTime = std::max(params[CHIP_PARAM_T_WP], params[CHIP_PARAM_T_RP]);
7374
waitSetupTime = waitSetupTime / tHCLK - 1;
7475
waitSetupTime = waitSetupTime <= 0 ? 0 : ceil(waitSetupTime);
7576
stmParams->waitSetupTime = static_cast<uint8_t>(waitSetupTime);
@@ -90,8 +91,8 @@ void ParallelChipInfo::chipInfoToStmParams(StmParams *stmParams)
9091
/* (HOLD + 1) * tHCLK >= max(tCH, tCLH, tALH) */
9192
holdSetupTime =*std::max_element(holdArr.begin(), holdArr.end());
9293
holdSetupTime = holdSetupTime / tHCLK - 1;
93-
/* K9F2G08U0C requires at least 1 tick */
94-
holdSetupTime = holdSetupTime <= 0 ? 1 : ceil(holdSetupTime);
94+
/* K9F2G08U0C requires at least 2 tick */
95+
holdSetupTime = holdSetupTime <= 0 ? 2 : ceil(holdSetupTime);
9596
stmParams->holdSetupTime = static_cast<uint8_t>(holdSetupTime);
9697

9798
/* ((WAIT + 1) + (HOLD + 1) + (SET + 1)) * tHCLK >= max(tWC, tRC) */
@@ -102,12 +103,17 @@ void ParallelChipInfo::chipInfoToStmParams(StmParams *stmParams)
102103
stmParams->setupTime++;
103104
}
104105

105-
/* Not clear how to calculate, use the same approach as above */
106-
arSetupTime = params[CHIP_PARAM_T_AR] / tHCLK - 1;
106+
/* RM0008 Reference manual
107+
In any case, it turns out 0 */
108+
/* t_ar = (TAR + SET + 4) × THCLK
109+
t_ar / THCLK - 4 - SET = TAR */
110+
arSetupTime = params[CHIP_PARAM_T_AR] / tHCLK - 4 - stmParams->setupTime;
107111
arSetupTime = arSetupTime <= 0 ? 0 : ceil(arSetupTime);
108112
stmParams->arSetupTime = static_cast<uint8_t>(arSetupTime);
109113

110-
clrSetupTime = params[CHIP_PARAM_T_CLR] / tHCLK - 1;
114+
/* t_clr = (TCLR + SET + 4) × THCLK
115+
t_clr / THCLK - 4 - SET = TCLR */
116+
clrSetupTime = params[CHIP_PARAM_T_CLR] / tHCLK - 4 - stmParams->setupTime;
111117
clrSetupTime = clrSetupTime <= 0 ? 0 : ceil(clrSetupTime);
112118
stmParams->clrSetupTime = static_cast<uint8_t>(clrSetupTime);
113119
}

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