Add AOCODARCG440_AIO target

[aocodarc]

Checklist (✓/✕, or y/n)

• passed Betaflight team's schematics review
• passed hardware samples testing
• follows guidelines
• follows connector standards
• flight tested
• comments/issues resolved

Summary by CodeRabbit

• New Features
  • Added support for the AOCODARCG440_AIO flight controller board, enabling users to configure and operate this new hardware platform with full feature compatibility including stabilization sensors, barometric altitude control, onscreen display capabilities, and comprehensive peripheral connectivity options for enhanced drone control.

[coderabbitai]

Walkthrough

A new board configuration header file was added for the AOCODARCG440_AIO target in Betaflight. The configuration defines the MCU type (STM32G47X), board identification, enabled peripheral features, pin mappings for motors, LEDs, UARTs, I2C, SPI and ADC, timer configurations, and default peripheral instance assignments.

Changes

Cohort / File(s)	Summary
AOCODARCG440_AIO Board Configuration configs/AOCODARCG440_AIO/config.h	New configuration header defining MCU (STM32G47X), features (ACC, GYRO, BARO, FLASH, MAX7456), pin mappings for motors, LEDs, UARTs, I2C, SPI and ADC, timer configuration entries, and peripheral instance defaults (SPI devices, I2C, blackbox, beeper polarity, clock settings)

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~10 minutes

This is a straightforward addition of configuration data for a new board target. Review effort is primarily spent verifying pin mappings, feature assignments, and peripheral configurations match the hardware specifications and follow established conventions.

Suggested reviewers

• haslinghuis
• nerdCopter
• sugaarK

Pre-merge checks and finishing touches

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Description Check	⚠️ Warning	The pull request description is significantly incomplete and missing critical required sections from the template. The author has only provided a partially filled checklist without including the mandatory "Pull-Request requirements," "Hardware Compliance Requirements," or "Housekeeping" sections that are specified in the description template. Additionally, there is no substantive description of what is being added (the AOCODARCG440_AIO configuration) or any explanation of the changes. While some checklist items are marked (schematics review, guidelines, connector standards), the description lacks the required structural elements and explanatory content that would allow reviewers to understand the scope and compliance status of this new flight controller submission.	The author should revise the PR description to include all required template sections: the mandatory review requirements section, hardware compliance requirements section, and housekeeping section. The description should also include a brief summary of the new AOCODARCG440_AIO board being added and explain why certain checklist items remain unchecked (such as hardware samples testing and flight testing). This will ensure reviewers have complete information about the submission's compliance status and readiness for merge.

✅ Passed checks (2 passed)

Check name	Status	Explanation
Title Check	✅ Passed	The pull request title "Add AOCODARCG440_AIO target" directly and accurately summarizes the main change in the changeset, which adds a new configuration header file for the AOCODARCG440_AIO board in Betaflight. The title is concise, specific, and clearly communicates the primary objective without noise or vague terminology. A reviewer scanning the history would immediately understand that this PR introduces a new hardware target configuration.
Docstring Coverage	✅ Passed	No functions found in the changes. Docstring coverage check skipped.

✨ Finishing touches

• 📝 Generate docstrings

🧪 Generate unit tests (beta)

• Create PR with unit tests
• Post copyable unit tests in a comment

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[osirisinferi]

Looks like the 4 motor pins are divided over 3 (!?) timers?

M1 -> PB0 -> TIM3 CH3
M2 -> PB1 -> TIM3 CH4
M3 -> PB9 -> TIM4 CH4
M4 -> PB2 -> TIM5 CH1

According to the current guidelines:

first 4 motors are required to use a 1 GPIO and one 4-channel timer.

(Emphesis mine.)

Edit:
If this was approved before the most recent motor requirements were in effect, please disregard the above.

[ot0tot]

Looks like the 4 motor pins are divided over 3 (!?) timers?

M1 -> PB0 -> TIM3 CH3 M2 -> PB1 -> TIM3 CH4 M3 -> PB9 -> TIM4 CH4 M4 -> PB2 -> TIM5 CH1

According to the current guidelines:

first 4 motors are required to use a 1 GPIO and one 4-channel timer.

(Emphesis mine.)

Edit: If this was approved before the most recent motor requirements were in effect, please disregard the above.

As long as the motors are on the same port for a FC using bitbang, it's fine. The G4 is somewhat limited in IO, so there aren't a lot of good options.