graceful AP boot, ensure its done after BSP IDT, and bring up same IDT on all the APs

Author: braindigitalis

include/acpi.h

@@ -128,14 +128,7 @@ typedef struct pci_irq_route {
  *
  * This function parses the MADT (APIC table) and sets up CPU topology and IOAPIC data.
  */
-void init_cores();
-
-/**
- * @brief Get an array of Local APIC IDs.
- *
- * @return Pointer to array of LAPIC IDs (size = get_cpu_count()).
- */
-uint8_t* get_lapic_ids();
+void init_acpi();
 
 /**
  * @brief Get total number of CPUs detected via ACPI.

include/apic.h

@@ -117,3 +117,5 @@ uint32_t get_lapic_id_from_cpu_id(uint8_t cpu_id);
  *                 or 255 if unmapped.
  */
 uint8_t get_cpu_id_from_lapic_id(uint32_t lapic_id);
+
+void boot_aps();

include/idt.h

@@ -121,7 +121,7 @@ void io_wait(void);
  * Message Signalled Interrupts (MSI/MSI-X), associated with
  * the specified Local APIC ID.
  *
- * @param cpu Local APIC ID of the target CPU.
+ * @param cpu Logical CPU ID of the target CPU.
  *
  * @return Vector number (64–255) on success,
  *         -1 if no free vector is available on that CPU.
@@ -139,7 +139,7 @@ int alloc_msi_vector(uint8_t cpu);
  * Marks the given MSI vector as available for reuse on the specified
  * Local APIC ID.
  *
- * @param cpu Local APIC ID of the CPU that the vector belongs to.
+ * @param cpu Logical CPU ID of the CPU that the vector belongs to.
  * @param vec    The MSI vector to free (64–255).
  *
  * @warning Behaviour is undefined if freeing a vector that

src/acpi.c

@@ -2,6 +2,7 @@
 #include <uacpi/uacpi.h>
 #include <uacpi/namespace.h>
 #include <uacpi/resources.h>
+#include <stdatomic.h>
 #include "uacpi/context.h"
 
 volatile struct limine_rsdp_request rsdp_request = {
@@ -11,6 +12,8 @@ volatile struct limine_rsdp_request rsdp_request = {
 
 extern volatile struct limine_smp_request smp_request;
 
+extern atomic_size_t aps_online;
+
 static uint8_t lapic_ids[256] = {0}; // CPU core Local APIC IDs
 static uint8_t ioapic_ids[256] = {0}; // CPU core Local APIC IDs
 static uint16_t numcore = 0;         // number of cores detected
@@ -128,7 +131,7 @@ ioapic_t get_ioapic(uint16_t index) {
 	return ioapic;
 }
 
-void init_cores() {
+void init_acpi() {
 	uint8_t *ptr, *ptr2;
 	uint32_t len;
 	uint8_t *rsdt = (uint8_t *) get_sdt_header();
@@ -212,6 +215,13 @@ void init_cores() {
 				(r->detected_from == FROM_MADT ? "_MADT" : (r->detected_from == FROM_PRT ? "_PRT" : "FALLBACK")));
 		}
 	}
+	for (int i = 0; i < 16; ++i) {
+		dprintf("IRQ %d maps to GSI %d\n", i, irq_to_gsi(i));
+	}
+	rr_flip();
+}
+
+void boot_aps() {
 	if (numcore > 0) {
 		kprintf("SMP: %d cores, %d IOAPICs\n", numcore, numioapic);
 		if (!smp_request.response) {
@@ -230,18 +240,18 @@ void init_cores() {
 				set_lapic_id_for_cpu_id(cpu->processor_id, cpu->lapic_id);
 			}
 			if (cpu->lapic_id == smp_request.response->bsp_lapic_id || cpu->processor_id > 254) {
+				if (cpu->lapic_id == smp_request.response->bsp_lapic_id) {
+					kprintf("CPU: %d online; ID: %d\n", cpu->processor_id, cpu->lapic_id);
+				}
 				// Skip BSP and IDs over 254 (255 is broadcast, 256+ are too big for our array)
 				continue;
-			} else if (cpu->lapic_id == smp_request.response->bsp_lapic_id) {
-				kprintf("CPU: %d online; ID: %d\n", cpu->processor_id, cpu->lapic_id);
 			}
 			cpu->goto_address = kmain_ap;
 		}
+		while (atomic_load(&aps_online) < limit - 1) {
+			_mm_pause();
+		}
 	}
-	for (int i = 0; i < 16; ++i) {
-		dprintf("IRQ %d maps to GSI %d\n", i, irq_to_gsi(i));
-	}
-	rr_flip();
 }
 
 uint32_t irq_to_gsi(uint8_t irq) {

src/ap.c

@@ -1,14 +1,27 @@
 #include <kernel.h>
+#include <stdatomic.h>
 
 volatile struct limine_smp_request smp_request = {
 	.id = LIMINE_SMP_REQUEST,
 	.revision = 0
 };
 
+extern volatile idt_ptr_t idt64;
+
+atomic_size_t aps_online = 0;
+
 void kmain_ap(struct limine_smp_info *info)
 {
+	// Load the shared IDT
+	__asm__ volatile("lidtq (%0)" :: "r"(&idt64));
+	interrupts_on();
+
 	kprintf("CPU: %u online; ID: %u\n", info->processor_id, info->lapic_id);
-	wait_forever();
+	atomic_fetch_add(&aps_online, 1);
+
+	for(;;) {
+		_mm_pause();
+	}
 	/**
 	 * @todo Insert cpu-local scheduler loop here.
 	 * Each AP will run its own list of executing BASIC processes. Accessing

src/apic.c

@@ -4,12 +4,7 @@
 #define IA32_APIC_BASE_MSR 0x1B
 #define APIC_BASE_X2APIC_ENABLE (1ULL << 10)
 
- static uint64_t saved_lapic = 0;
-
- uint64_t get_lapic_address() {
-	if (saved_lapic) {
-		return saved_lapic;
-	}
+uint64_t get_lapic_address() {
 	uint32_t eax, edx;
 	__asm__ volatile (
 		"rdmsr"
@@ -18,7 +13,6 @@
 		);
 	uint64_t result = ((uint64_t)edx << 32) | eax;
 	result &= 0xFFFFFFFFFFFFF000ULL;
-	saved_lapic = result;
 	return result;
 }
 

src/idt.c

@@ -104,7 +104,6 @@ void init_idt() {
 #ifdef USE_IOAPIC
 	pic_disable();
 	remap_irqs_to_ioapic();
-	get_lapic_address();
 	init_lapic_timer();
 #else
 	pic_enable();

src/init.c

@@ -7,16 +7,16 @@ spinlock_t debug_console_spinlock = 0;
 
 init_func_t init_funcs[] = {
 	init_heap, validate_limine_page_tables_and_gdt, init_console,
-	init_cores, init_idt, init_pci, init_realtime_clock,
+	init_acpi, init_idt, boot_aps, init_pci, init_realtime_clock,
 	init_devicenames, init_keyboard, init_ide, init_ahci,
 	init_filesystem, init_iso9660, init_devfs, init_fat32,
 	init_rtl8139, init_e1000,
 	NULL,
 };
 
 char* init_funcs_names[] = {
-	"heap",		"gdt",			"console",	"cores",
-	"idt",		"pci",			"clock",
+	"heap",		"gdt",			"console",	"acpi",
+	"idt",		"cpus",			"pci",		"clock",
 	"devicenames",	"keyboard",		"ide",		"ahci",
 	"filesystem",	"iso9660",		"devfs",	"fat32",
 	"rtl8139",	"e1000",