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@KGrewal1 KGrewal1 commented Oct 4, 2025

@KGrewal1 KGrewal1 requested a review from a team as a code owner October 4, 2025 09:05
@KGrewal1 KGrewal1 requested review from alexcrichton and removed request for a team October 4, 2025 09:05
@KGrewal1 KGrewal1 requested a review from a team as a code owner October 4, 2025 09:50
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KGrewal1 commented Oct 4, 2025

Added fix for #11785 @alexcrichton (missed that if const is 0, ctz, should be the type width), and tried to add runtests for srem.

@KGrewal1 KGrewal1 changed the title WIP Constant propagation opts Constant propagation opts Oct 4, 2025
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KGrewal1 commented Oct 4, 2025

will run cargo +nightly fuzz run differential and see if it spots anything too

  • OOMd on my machine before it found anything...

@github-actions github-actions bot added cranelift Issues related to the Cranelift code generator isle Related to the ISLE domain-specific language labels Oct 4, 2025
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;; x % 1 == 0
(rule (simplify_skeleton (urem x (iconst_u ty 1))) (iconst_u ty 0))
(rule (simplify_skeleton (srem x (iconst_u ty 1))) (iconst_u ty 0))
(rule (simplify_skeleton (srem x (iconst_s ty -1))) (iconst_u ty 0))
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How come this was removed? Was this an incorrect optimization?

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Yes - in combination with the urem const optimization led to optimizing imin rem -1 to 0 instead of having it trap which it should

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Ah that's actually a point where Rust and WebAssembly differ. Rust panicks on i32::MIN % -1 while WebAssembly returns 0. CLIF's semantics generally follow wasms, so I believe that this is still a correct optimization.

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Is that sufficient for CLIF (I guess at the least could cause issues in the rust cranelift backend if this occurs)?

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I'm not really sure what you mean by your question?

Regardless this isn't something we can really change. Wasm i32.rem_s is directly translated to a CLIF srem instruction. The CLIF instruction needs to mach the wasm instruction as a result, where the semantics of wasm is that i32::MIN % -1 is 0.

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@KGrewal1 I don't think we'll cause problems for cg_clif if we define srem to work with Wasm's semantics: we're defining it over a superset of the domain that Rust expects. Because other ISAs also work this way (e.g. aarch64 does not trap at all in divide/remainder operations), Rust already needs to reify its trapping semantics at a higher level; so the IR produced by cg_clif must necessarily contain the logic to panic on i32::MIN % -1, but that's already the case.

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