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Update read/written registers for x86 enter/leave instructions - #2788

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Rot127 merged 1 commit into
capstone-engine:nextfrom
hainest:thaines/x86_enter_leave
Oct 2, 2025
Merged

Update read/written registers for x86 enter/leave instructions#2788
Rot127 merged 1 commit into
capstone-engine:nextfrom
hainest:thaines/x86_enter_leave

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@hainest

@hainest hainest commented Sep 22, 2025

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Your checklist for this pull request

  • I've documented or updated the documentation of every API function and struct this PR changes.
  • I've added tests that prove my fix is effective or that my feature works (if possible)

Detailed description

The sp and bp registers are now converted to the correct 16- and 64-bit versions.

Test plan

Tests are included.

@github-actions github-actions Bot added the X86 Arch label Sep 22, 2025
Comment thread arch/X86/X86Mapping.c

case X86_INS_ENTER:
case X86_INS_LEAVE:
switch (h->mode) {

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The registers for CS_MODE_32 are alright and need no change?

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The entry in the mapping file uses the 32-bit registers by default. I added tests for that case, just to make sure.

@Rot127

Rot127 commented Sep 30, 2025

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Please rebase

@hainest
hainest force-pushed the thaines/x86_enter_leave branch from f34c62c to f589611 Compare October 1, 2025 19:44
@Rot127
Rot127 merged commit dbfc425 into capstone-engine:next Oct 2, 2025
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@hainest
hainest deleted the thaines/x86_enter_leave branch October 2, 2025 18:10
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2 participants