Fix sysreg registers in RISC-V and modify the header patcher to not crash if a header doesn't include all tags of a generated .inc file#2894
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Rot127
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Good catch with the script.
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Also update the Python bindings. |
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@Rot127 I added tests anyway because the all the existing tests on sysregs were just asserting on their string representation in yaml, which obviously didn't catch the API problem. The unit tests I added switch on CSR registers and fail if the switch didn't match, so it will fail to compile the C test and fail at runtime for the Python test if the API changed or removed the sysreg names. There was no need to update the Python bindings because the sysregs were already defined as integer constants (the tables mapping back and fourth from the string representation are needed in Python too). |
Rot127
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Thanks for the extra tests. It warms my pedantic heart.
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Detailed description
As per #2893, the public header
riscv.hdoesn't define an enum for system registers. Therefore, it was impossible to programmatically switch on the value of a system register without violating API safety (by e.g. simply duplicating the raw numbers from capstone sources).This PR fixes this by adding enum constants in
riscv.hto represent system registers.In order to do this, the archiecture header patch tool had to be modified to not crash if a
ARCH*.incfile defined several#ifdefblocks but the including headerARCH.hin capstone didn't include some of them. Previously, theARCH.hfile had to include every block of#ifdefcontent somewhere in it, andriscv.hdoesn't need this.Test plan
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Closing issues
closes #2893.