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feat: add support for CH643 series#145

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WayneWu3 wants to merge 5 commits intoch32-rs:mainfrom
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Open

feat: add support for CH643 series#145
WayneWu3 wants to merge 5 commits intoch32-rs:mainfrom
WayneWu3:main

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Description

Adds initial support for the WCH CH643 series.

Dependency Note:
This PR relies on ch32-rs/ch32-data#23 (adds missing PIOC interrupt).

Since ch32-metapac is generated from ch32-data, I verified this by locally generating the metapac with the patched data. This PR does not include those generated files; it's ready to merge once upstream ch32-data is updated and released.

Changes

  • Mapped CH643 to use the x0 RCC implementation.
  • Enabled 16-line EXTI support in src/exti.rs.
  • Registered the ch643 feature in Cargo.toml and updated documentation.
  • Added verification examples under examples/ch643: basic blinky, embassy (async/clock tree), PWM, and ADC.

Hardware Verification

All tests were performed on a CH643 development board using wlink for flashing and SDI logging.

Blinky

  • The onboard LED (PB17) toggles correctly at 500ms intervals using blocking delay, and Systick counts increment as expected in the logs.
$ cargo +nightly run --release --bin blinky
......
    Finished `release` profile [optimized] target(s) in 0.34s
     Running `wlink flash --enable-sdi-print --watch-serial target/riscv32imc-unknown-none-elf/release/blinky`
11:39:50 [INFO] Connected to WCH-Link v2.14(v34) (WCH-LinkE-CH32V305)
11:39:50 [INFO] Attached chip: CH643 (ChipID: 0x64310621)
11:39:50 [INFO] Chip ESIG: FlashSize(62KB) UID(cd-ab-be-d5-4d-bc-d8-3d)
11:39:50 [INFO] Flash protected: false
11:39:50 [INFO] Read target/riscv32imc-unknown-none-elf/release/blinky as ELF format
11:39:50 [INFO] Flashing 5692 bytes to 0x08000000
█████████████████████████████████████████████████████████████████████████████████████████████████████████████████████ 5692/569211:39:50 [INFO] Flash done
11:39:51 [INFO] Now reset...
11:39:51 [INFO] Now connect to the WCH-Link serial port to read SDI print
2026-01-22 19:39:51.958: toggle!
2026-01-22 19:39:51.959: systick: 4000012
2026-01-22 19:39:52.460: toggle!
2026-01-22 19:39:52.461: systick: 4000013
2026-01-22 19:39:52.962: toggle!
2026-01-22 19:39:52.963: systick: 4000016
2026-01-22 19:39:53.464: toggle!
2026-01-22 19:39:53.465: systick: 4000013
2026-01-22 19:39:53.966: toggle!
2026-01-22 19:39:53.967: systick: 4000016

Embassy Blinky

  • Configured to 48MHz HSI. Confirmed that the async LED task and main loop run concurrently with accurate timing, verifying the clock tree setup.
$ cargo +nightly run --release --bin embassy_blinky
......
    Finished `release` profile [optimized] target(s) in 0.47s
     Running `wlink flash --enable-sdi-print --watch-serial target/riscv32imc-unknown-none-elf/release/embassy_blinky`
11:42:48 [INFO] Connected to WCH-Link v2.14(v34) (WCH-LinkE-CH32V305)
11:42:48 [INFO] Attached chip: CH643 (ChipID: 0x64310621)
11:42:48 [INFO] Chip ESIG: FlashSize(62KB) UID(cd-ab-be-d5-4d-bc-d8-3d)
11:42:48 [INFO] Flash protected: false
11:42:48 [INFO] Read target/riscv32imc-unknown-none-elf/release/embassy_blinky as ELF format
11:42:48 [INFO] Flashing 14240 bytes to 0x08000000
███████████████████████████████████████████████████████████████████████████████████████████████████████████████████ 14240/1424011:42:49 [INFO] Flash done
11:42:49 [INFO] Now reset...
11:42:49 [INFO] Now connect to the WCH-Link serial port to read SDI print
2026-01-22 19:42:49.864: 0), hclk: Hertz(48000000), pclk1: Hertz(48000000), pclk2: Hertz(48000000), pclk1_tim: Hertz(48000000), pclk2_tim: Hertz(48000000) }
2026-01-22 19:42:50.881: tick
2026-01-22 19:42:51.882: tick
2026-01-22 19:42:52.883: tick

PWM

  • Verified via oscilloscope; the waveform duty cycle cycles smoothly between min and max as expected.
$ cargo +nightly run --release --bin pwm
......
    Finished `release` profile [optimized] target(s) in 0.06s
     Running `wlink flash --enable-sdi-print --watch-serial target/riscv32imc-unknown-none-elf/release/pwm`
11:45:18 [INFO] Connected to WCH-Link v2.14(v34) (WCH-LinkE-CH32V305)
11:45:18 [INFO] Attached chip: CH643 (ChipID: 0x64310621)
11:45:18 [INFO] Chip ESIG: FlashSize(62KB) UID(cd-ab-be-d5-4d-bc-d8-3d)
11:45:18 [INFO] Flash protected: false
11:45:18 [INFO] Read target/riscv32imc-unknown-none-elf/release/pwm as ELF format
11:45:18 [INFO] Flashing 2616 bytes to 0x08000000
█████████████████████████████████████████████████████████████████████████████████████████████████████████████████████ 2616/261611:45:18 [INFO] Flash done
11:45:19 [INFO] Now reset...
11:45:19 [INFO] Now connect to the WCH-Link serial port to read SDI print

ADC

  • Verified using a square wave (1V/2V) generated by an STM32 DAC. The log output accurately reflects the input, alternating between approx. 1240 (1V) and 2460 (2V) in real-time.
$ cargo +nightly run --release --bin adc
......
    Finished `release` profile [optimized] target(s) in 0.08s
     Running `wlink flash --enable-sdi-print --watch-serial target/riscv32imc-unknown-none-elf/release/adc`
12:04:40 [INFO] Connected to WCH-Link v2.14(v34) (WCH-LinkE-CH32V305)
12:04:40 [INFO] Attached chip: CH643 (ChipID: 0x64310621)
12:04:40 [INFO] Chip ESIG: FlashSize(62KB) UID(cd-ab-be-d5-4d-bc-d8-3d)
12:04:40 [INFO] Flash protected: false
12:04:40 [INFO] Read target/riscv32imc-unknown-none-elf/release/adc as ELF format
12:04:40 [INFO] Flashing 4624 bytes to 0x08000000
█████████████████████████████████████████████████████████████████████████████████████████████████████████████████████ 4624/462412:04:41 [INFO] Flash done
12:04:41 [INFO] Now reset...
12:04:41 [INFO] Now connect to the WCH-Link serial port to read SDI print
2026-01-22 20:04:42.524: adc: 1223
2026-01-22 20:04:43.526: adc: 1247
2026-01-22 20:04:44.527: adc: 1248
2026-01-22 20:04:45.528: adc: 1243
2026-01-22 20:04:46.529: adc: 2451
2026-01-22 20:04:47.531: adc: 2467
2026-01-22 20:04:48.532: adc: 2467
2026-01-22 20:04:49.533: adc: 1233
2026-01-22 20:04:50.533: adc: 2448
2026-01-22 20:04:51.534: adc: 2467
2026-01-22 20:04:52.535: adc: 1231
2026-01-22 20:04:53.537: adc: 1247

@andelf
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andelf commented Jan 31, 2026

Nice work! Could you add ch643 to CI test matrix?

@WayneWu3
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Nice work! Could you add ch643 to CI test matrix?

Thanks for the review! I've added ch643 to the CI test matrix.

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2 participants