CA2024_Branch-prediction-5-stage-RISCV

This repository is the term project for the Computer Architecture course.

Course Link: NCKU Computer Architecture

Project Documentation: HackMD Document

Goal

• Studying 5-Stage-RV32I

• Refer to the books mentioned at the bottom of the ChiselRiscV page to learn how to design a RISC-V processor using Chisel.

• Introduce branch prediction mechanisms into the 5-Stage-RV32I project and thoroughly validate them.