Update polling method for IDevID CSR in Caliptra.md#585
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Update polling method for IDevID CSR in Caliptra.md#585
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| 7. HVM, through JTAG or using the Caliptra SoC interface, writes to “CPTRA\_BOOTFSM\_GO” to allow Caliptra’s internal BootFSM to continue to bring up microcontroller out of reset. | ||
| 8. ROM reads the manufacturing state encoding from the “CPTRA\_DBG\_MANUF\_SERVICE\_REG” register, acquires the mailbox lock, and populates the Caliptra internal SRAM (the mailbox SRAM hardware structure is reused) with the CSR. | ||
| 9. HVM, through JTAG or using the SoC interface, polls for the “IDevID CSR ready" bit 24 that is set in “CPTRA\_FLOW\_STATUS” register. | ||
| 9. HVM, using the SoC interface, polls for the “IDevID CSR ready" bit 24 that is set in “CPTRA\_FLOW\_STATUS” register. |
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This should also be fixed in the 2.0 and 1.X versions.
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1.x version has been updated.
2.0 doc points to an html version of the spec in main
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That 2.0 HTML doc is rendered from the .ocp source, which I think needs to be updated too:
https://github.com/chipsalliance/Caliptra/blob/main/doc/caliptra_20/Caliptra.ocp
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