Improve top-level module guessing method in base runner class#8228
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Arya-Golkari wants to merge 1 commit intochipsalliance:masterfrom
Open
Improve top-level module guessing method in base runner class#8228Arya-Golkari wants to merge 1 commit intochipsalliance:masterfrom
Arya-Golkari wants to merge 1 commit intochipsalliance:masterfrom
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@wsnyder , @kbieganski, any chance we can get this merged? |
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Currently, the
BaseRunnermethodguess_top_modulejust greps for the first module in the file if the top-level module is not passed as a parameter. However, most tests follow a helpful naming convention: top-level modules are conveniently namedtop. This PR modifiesguess_top_moduleto exploit this pattern.This PR was motivated by "The force and release procedural statements" test, where the top-level module is currently guessed to be
flopinstead oftop. This has led CIRCT-Verilog to erroneously pass this test.I'd really appreciate help from reviewers! @fabianschuiki @kbieganski