Parmys (Partial Mapper for Yosys) plugin

.github/workflows/licensing.yml

@@ -33,5 +33,15 @@ jobs:
           ./design_introspection-plugin/tests/selection_to_tcl_list/selection_to_tcl_list.v
           ./third_party/minilitex_ddr_arty/minilitex_ddr_arty.v
           ./third_party/VexRiscv_Lite/VexRiscv_Lite.v
+          ./third_party/vtr/verilog/eltwise_layer.v
+          ./third_party/vtr/verilog/raygentop.v
+          ./third_party/vtr/verilog/hard_block_include.v
+          ./third_party/vtr/arch/k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml
+          ./third_party/vtr/arch/k6_frac_N10_frac_chain_mem32K_40nm.xml
+          ./third_party/vtr/primitives.v
         third_party: |
           ./third_party/googletest/
+          ./third_party/libargparse/
+          ./third_party/pugixml/
+          ./third_party/vtr/
+          .third_party/mips32r1_core/

.gitmodules

@@ -4,3 +4,12 @@
 [submodule "third_party/make-env"]
 	path = third_party/make-env
 	url = https://github.com/SymbiFlow/make-env.git
+[submodule "third_party/pugixml"]
+	path = third_party/pugixml
+	url = https://github.com/zeux/pugixml.git
+[submodule "third_party/libargparse"]
+	path = third_party/libargparse
+	url = https://github.com/kmurray/libargparse.git
+[submodule "third_party/mips32r1_core"]
+	path = third_party/mips32r1_core
+	url = https://github.com/grantae/mips32r1_core.git

Makefile

@@ -14,7 +14,7 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 
-PLUGIN_LIST := fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf systemverilog uhdm dsp-ff
+PLUGIN_LIST := fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf systemverilog uhdm dsp-ff parmys
 PLUGINS := $(foreach plugin,$(PLUGIN_LIST),$(plugin).so)
 PLUGINS_INSTALL := $(foreach plugin,$(PLUGIN_LIST),install_$(plugin))
 PLUGINS_CLEAN := $(foreach plugin,$(PLUGIN_LIST),clean_$(plugin))

parmys-plugin/Makefile

@@ -0,0 +1,112 @@
+# Copyright 2022 Daniel Khadivi
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+PLUGIN_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+
+NAME = parmys
+SOURCES = parmys.cc \
+		  parmys_arch.cc \
+		  parmys_update.cc \
+		  parmys_utils.cc \
+		  parmys_resolve.cc \
+		  src/adders.cc \
+		  src/enum_str.cc \
+		  src/MixingOptimization.cc \
+		  src/read_xml_config_file.cc \
+		  src/odin_error.cc \
+		  src/odin_util.cc \
+		  src/netlist_statistic.cc \
+		  src/netlist_utils.cc \
+		  src/netlist_check.cc \
+		  src/netlist_cleanup.cc \
+		  src/node_creation_library.cc \
+		  src/multipliers.cc \
+		  src/subtractions.cc \
+		  src/HardSoftLogicMixer.cc \
+		  src/odin_ii.cc \
+		  src/string_cache.cc \
+		  src/partial_map.cc \
+		  src/hard_blocks.cc \
+		  src/BlockMemories.cc \
+		  src/memories.cc \
+		  src/netlist_visualizer.cc \
+		  src/Hashtable.cc \
+		  src/ast_util.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_util.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_token.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_memory.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_list.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_log.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_expr_eval.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_digest.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_math.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_path.cc \
+		  ../third_party/vtr/libs/vtrutil/src/vtr_assert.cc \
+		  ../third_party/vtr/libs/log/src/log.cc \
+		  ../third_party/pugixml/src/pugixml.cpp \
+		  ../third_party/libargparse/src/argparse.cpp \
+		  ../third_party/libargparse/src/argparse_formatter.cpp \
+		  ../third_party/libargparse/src/argparse_util.cpp \
+		  ../third_party/vtr/libs/rtlnumber/src/rtl_int.cc \
+		  ../third_party/vtr/libs/rtlnumber/src/rtl_utils.cc \
+		  ../third_party/vtr/libs/pugiutil/src/pugixml_loc.cc \
+		  ../third_party/vtr/libs/pugiutil/src/pugixml_util.cc \
+		  ../third_party/vtr/libs/archfpga/src/physical_types.cc \
+		  ../third_party/vtr/libs/archfpga/src/read_xml_util.cc \
+		  ../third_party/vtr/libs/archfpga/src/arch_error.cc \
+		  ../third_party/vtr/libs/archfpga/src/physical_types_util.cc \
+		  ../third_party/vtr/libs/archfpga/src/arch_check.cc \
+		  ../third_party/vtr/libs/archfpga/src/arch_util.cc \
+		  ../third_party/vtr/libs/archfpga/src/read_xml_arch_file.cc \
+		  ../third_party/vtr/libs/archfpga/src/parse_switchblocks.cc \
+		  ../third_party/vtr/libs/archfpga/src/echo_arch.cc
+
+include ../Makefile_plugin.common
+
+CXXFLAGS += -I./include
+CXXFLAGS += -I../third_party/pugixml/src
+CXXFLAGS += -I../third_party/libargparse/src
+CXXFLAGS += -I../third_party/vtr/libs/archfpga/src
+CXXFLAGS += -I../third_party/vtr/libs/log/src
+CXXFLAGS += -I../third_party/vtr/libs/pugiutil/src
+CXXFLAGS += -I../third_party/vtr/libs/rtlnumber/src/include
+CXXFLAGS += -I../third_party/vtr/libs/rtlnumber/src
+CXXFLAGS += -I../third_party/vtr/libs/vtrutil/src
+CXXFLAGS += -I../third_party/vtr/libs/vpr/src/draw
+
+CXXSTD := c++14
+CXXFLAGS += -std=$(CXXSTD) -Os
+
+LDLIBS += -lpthread
+
+TECHLIBS_DIR = techlibs
+VERILOG_MODULES = adff2dff.v \
+				  adffe2dff.v \
+				  aldff2dff.v \
+				  aldffe2dff.v \
+				  vtr_primitives.v
+
+# install_modules: $(VERILOG_MODULES)
+# install -D $< $(YOSYS_PLUGINS_DIR)/parmys/$<
+install_modules:
+	$(foreach f, $(wildcard $(TECHLIBS_DIR)/*), install -D $(f) $(YOSYS_DATA_DIR)/parmys/$(notdir $(f));)
+
+install: install_modules
+
+clean_modules:
+	rm -rf ./third_party
+
+clean: clean_modules

parmys-plugin/include/BlockMemories.hpp

@@ -0,0 +1,100 @@
+/**
+ * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * @file This file includes the definition of the basic structure
+ * used in Odin-II Block Memory resolving process. Moreover, it
+ * provides the declaration of the related public routines.
+ */
+#ifndef _BLOCK_MEMORIES_H_
+#define _BLOCK_MEMORIES_H_
+
+#include <unordered_map>
+
+// Max number of bits for register of array inference
+const int LUTRAM_INFERENCE_THRESHOLD_MIN = 80;  // Max number of bits for LUTRAM inference
+const int LUTRAM_INFERENCE_THRESHOLD_MAX = 640; // Min number of bits for LUTRAM inference
+
+/*
+ * Contains a pointer to the block memory node as well as other
+ * information which is used in creating the block memory.
+ */
+struct block_memory_t {
+    loc_t loc;
+    nnode_t *node;
+
+    signal_list_t *read_addr;
+    signal_list_t *read_data;
+    signal_list_t *read_en;
+
+    signal_list_t *write_addr;
+    signal_list_t *write_data;
+    signal_list_t *write_en;
+
+    signal_list_t *clk;
+
+    char *name;
+    char *memory_id;
+};
+
+typedef std::unordered_map<std::string, block_memory_t *> block_memory_hashtable;
+
+/**
+ * block memories information. variable will be invalid
+ * after iterations happen before partial mapping
+ */
+struct block_memory_information_t {
+    /**
+     * block_memory_list and read-only_memory_list linked lists
+     * include the corresponding memory instances. Each instance
+     * comprises memory signal lists, location, memory id and the
+     * corresponding netlist node. These linked lists are used in
+     * optimization iteration, including signal pruning, REG/LUTRAM
+     * threshold checking and mapping to VTR memory blocks. Once the
+     * optimization iteration is done, these linked lists are not
+     * valid anymore.
+     *
+     * [NOTE] Block memories and read-only memory both use the same
+     * structure (block_memory_t*). They only differ in terms of
+     * their member variables initialization. The naming convention
+     * is only due to the ease of the coding process.
+     */
+    vtr::t_linked_vptr *block_memory_list;
+    vtr::t_linked_vptr *read_only_memory_list;
+    /* hashtable to look up block memories faster */
+    block_memory_hashtable block_memories;
+    block_memory_hashtable read_only_memories;
+};
+extern block_memory_information_t block_memories_info;
+
+extern void init_block_memory_index();
+extern void free_block_memories();
+
+extern void resolve_ymem_node(nnode_t *node, uintptr_t traverse_mark_number, netlist_t *netlist);
+extern void resolve_ymem2_node(nnode_t *node, uintptr_t traverse_mark_number, netlist_t *netlist);
+extern void resolve_bram_node(nnode_t *node, uintptr_t traverse_mark_number, netlist_t *netlist);
+extern void resolve_rom_node(nnode_t *node, uintptr_t traverse_mark_number, netlist_t *netlist);
+
+extern void iterate_block_memories(netlist_t *netlist);
+
+#endif // _BLOCK_MEMORIES_H_

parmys-plugin/include/HardSoftLogicMixer.hpp

@@ -0,0 +1,97 @@
+/*
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef HARD_SOFT_LOGIC_MIXER_HPP
+#define HARD_SOFT_LOGIC_MIXER_HPP
+
+#include "MixingOptimization.hpp"
+#include "odin_types.h" // netlist_t, config_t
+
+class HardSoftLogicMixer
+{
+  public:
+    HardSoftLogicMixer();
+    ~HardSoftLogicMixer();
+    /*----------------------------------------------------------------------
+     * Returns whether the specific node is a candidate for implementing
+     * in hard block
+     *---------------------------------------------------------------------
+     */
+    bool hardenable(nnode_t *node);
+
+    /*----------------------------------------------------------------------
+     * Function: map_deferred_blocksQueries if mixing optimization is enabled for this kind of
+     * of hard blocks
+     *---------------------------------------------------------------------
+     */
+    bool enabled(nnode_t *node);
+
+    /*----------------------------------------------------------------------
+     * Function: perform_optimizations
+     * For all  noted nodes, that were noted as candidates to be implemented
+     * on the hard blocks, launches corresponding procedure of chosing the
+     * corresponding blocks
+     * Parameters: netlist_t *
+     *---------------------------------------------------------------------
+     */
+    void perform_optimizations(netlist_t *netlist);
+
+    /*----------------------------------------------------------------------
+     * Function: partial_map_node
+     * High-level call to provide support for partial mapping layer
+     * Parameters:
+     *      node_t * : pointer to node needs to perform mapping
+     *      netlist_t : pointer to netlist
+     *---------------------------------------------------------------------
+     */
+    void partial_map_node(nnode_t *node, short traverse_number, netlist_t *);
+
+    /*----------------------------------------------------------------------
+     * Function: note_candidate_node
+     * Calculates number of available hard blocks by issuing a call,
+     * traverses the netlist and statistics to figure out
+     * which operation should be implemented on the hard block
+     * Parameters:
+     *      node_t * : pointer to candidate node
+     *---------------------------------------------------------------------
+     */
+    void note_candidate_node(nnode_t *node);
+
+    // This is a container containing all optimization passes
+    MixingOpt *_opts[operation_list_END];
+
+  private:
+    /*----------------------------------------------------------------------
+     * Function: hard_blocks_needed
+     * Returns cached value calculated from netlist, for a specific optimiza
+     * tion kind
+     *---------------------------------------------------------------------
+     */
+    int hard_blocks_needed(operation_list);
+
+    // This array is composed of vectors, that store nodes that
+    // are potential candidates for performing mixing optimization
+    std::vector<nnode_t *> _nodes_by_opt[operation_list_END];
+};
+
+#endif