systemverilog plugin: changes required for newer Surelog version #531
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Signed-off-by: Kamil Rakoczy <[email protected]>
Signed-off-by: Kamil Rakoczy <[email protected]>
Signed-off-by: Kamil Rakoczy <[email protected]>
Signed-off-by: Kamil Rakoczy <[email protected]>
Signed-off-by: Kamil Rakoczy <[email protected]>
tgorochowik
approved these changes
Aug 8, 2023
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This PR adapts plugin code for recent Surelog version.
UHDM-integration-tests PR: chipsalliance/UHDM-integration-tests#743
yosys-systemverilog CI: https://github.com/antmicro/yosys-systemverilog/actions/runs/5798599424