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Merge pull request #663 from ckormanyos/am6254_benches
Am6254 benches
2 parents 04acda9 + a44a0ee commit 3213d07

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+683
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lines changed

‎ref_app/ref_app.vcxproj‎

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‎ref_app/ref_app.vcxproj.filters‎

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‎ref_app/src/app/benchmark/readme.md‎

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@@ -78,44 +78,50 @@ $\pi$ using a Gauss AGM method with help
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from the [`decwide_t`](https://github.com/ckormanyos/real-time-cpp/blob/master/ref_app/src/math/wide_decimal/decwide_t.h)
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template class.
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A typical range of performance classes is shown in the following table.
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A very wide range of microcontroller performance classes is shown in the following table.
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The benchmark used is a ${\sim}100$ decimal digit AGM $\pi$ calculation.
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| Target | runtime $[ms]$ | relative |
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|--------------------|-----------------|------------|
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| `am335x` | 1.5 | 1.0 |
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| `stm32f446` | 5.1 | 3.4 |
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| `rpi_pico2_rp2350` | 6.3 | 4.2 |
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| `wch_ch32v307` | 8.0 | 5.3 |
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| `xtensa_esp32_s3` | 9.1 | 6.1 |
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| `rpi_pico_rp2040` | 19 | 13 |
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| `avr` | 420 | 280 |
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| `am6254_soc_` | 0.37 | 1.0 |
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| `am335x` | 1.5 | 4.0 |
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| `stm32f446` | 5.1 | 14 |
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| `rpi_pico2_rp2350` | 6.3 | 17 |
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| `wch_ch32v307` | 8.0 | 22 |
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| `xtensa_esp32_s3` | 9.1 | 25 |
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| `rpi_pico_rp2040` | 19 | 51 |
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| `avr` | 420 | 760 |
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There are strikingly differing performance classes
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for the $8$-bit MICROCHIP(R) AVR controller of the ARDUINO
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and the $32$-bit ARM(R) 8 controller
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of the BeagleBone Black Edition, Rev. C.
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The $\pi$ calculation requires approximately
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$420~\text{ms}$ and $1.5~\text{ms}$,
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$420~\text{ms}$ and $1.5~\text{ms,}~$
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respectively, on these two microcontroller systems.
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The $64$-bit ARM(R)v8-a (i.e., Cortex(R) A53) performs the
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calculation (running on one single A53 core of the PocketBeagle2 board)
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in $0.37~\text{ms.}$
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The $32$-bit ARM(R) Cortex(R) M4F controller on
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the `stm32f446` board performs the calculation in
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the middle of the two extremes, with a result
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of $5.1~\text{ms}$.
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The $32$-bit RISC-V controller (having a novel _open-source_ core)
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on the `wch_ch32v307` board boasts a quite respectable
109-
time of $8.0~\text{ms}$.
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time of $8.0~\text{ms.}$
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Running on only one core (core0) of the $32$-bit
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controller of the `xtensa_esp32_s3` board results in
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a runtime of $9.1~\text{ms}$ for the calculation.
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Using only one core (core1) on the $32$-bit ARM(R) Cortex(R) M0+
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controller of the `rpi_pico_rp2040` board results in a calculation
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time of $19~\text{ms}$. The next generation `rpi_pico2_rp2350`
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time of $19~\text{ms.}~$
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The next generation `rpi_pico2_rp2350`
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with dual ARM(R) Cortex(R) M33 cores definitively improves on this
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(still using only core1) with a time of $6.3~\text{ms}$.
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(still using only core1) with a time of $6.3~\text{ms.}~$
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This is slightly more than $3~\text{ms}$ times faster
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than its predecessor.

‎ref_app/src/mcal/am6254_soc/mcal_benchmark.h‎

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{
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namespace benchmark
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{
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typedef mcal::port::port_pin<mcal::reg::gpio0, 2U> benchmark_port_type;
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using benchmark_port_type = mcal::port::port_pin<mcal::reg::gpio0, 36U>;
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}
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}
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‎ref_app/src/mcal/am6254_soc/mcal_cpu.cpp‎

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///////////////////////////////////////////////////////////////////////////////
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
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// or copy at http://www.boost.org/LICENSE_1_0.txt)
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//
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#include <mcal_cpu.h>
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auto mcal::cpu::init() -> void
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{
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}

‎ref_app/src/mcal/am6254_soc/mcal_cpu.h‎

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///////////////////////////////////////////////////////////////////////////////
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Copyright Christopher Kormanyos 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
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// or copy at http://www.boost.org/LICENSE_1_0.txt)
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//
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#ifndef MCAL_CPU_2009_02_14_H
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#define MCAL_CPU_2009_02_14_H
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#ifndef MCAL_CPU_2025_07_30_H
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#define MCAL_CPU_2025_07_30_H
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#if defined(__cplusplus)
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#include <cstdint>
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#else
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#include <stdint.h>
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#endif
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extern "C" auto hw_acquire_spin_lock(volatile std::uint32_t*) noexcept -> void;
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extern "C" auto hw_release_spin_lock(volatile std::uint32_t*) noexcept -> void;
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#if defined(__cplusplus)
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extern "C"
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{
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#endif
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void mcal_cpu_secure_acquire_spin_lock(volatile uint32_t*);
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void mcal_cpu_secure_release_spin_lock(volatile uint32_t*);
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static inline void mcal_cpu_nop(void);
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#if defined(__cplusplus)
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}
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#endif
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#if defined(__cplusplus)
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namespace mcal
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{
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namespace cpu
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{
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void init();
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auto init() -> void;
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inline auto post_init() -> void { }
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inline auto nop() noexcept -> void { asm volatile("nop"); }
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inline auto acquire_spin_lock(volatile std::uint32_t* p_sync) noexcept -> void { hw_acquire_spin_lock(p_sync); }
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inline auto release_spin_lock(volatile std::uint32_t* p_sync) noexcept -> void { hw_release_spin_lock(p_sync); }
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inline auto acquire_spin_lock(volatile std::uint32_t* p_sync) noexcept -> void { mcal_cpu_secure_acquire_spin_lock(p_sync); }
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inline auto release_spin_lock(volatile std::uint32_t* p_sync) noexcept -> void { mcal_cpu_secure_release_spin_lock(p_sync); }
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}
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}
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#endif
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#if defined(__cplusplus)
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extern "C"
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{
51+
#endif
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static inline void mcal_cpu_nop(void) { __asm volatile("nop"); }
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#if defined(__cplusplus)
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}
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#endif
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#endif // MCAL_CPU_2009_02_14_H
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#endif // MCAL_CPU_2025_07_30_H

‎ref_app/src/mcal/am6254_soc/mcal_cpu_secure.s‎

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// ***************************************************************************************
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.section .text
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.type hw_acquire_spin_lock,@function
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.type mcal_cpu_secure_acquire_spin_lock,@function
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.align 3
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.globl hw_acquire_spin_lock
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.globl mcal_cpu_secure_acquire_spin_lock
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hw_acquire_spin_lock:
30+
mcal_cpu_secure_acquire_spin_lock:
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mov w1, #1
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.L_loop:
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ldaxr w2, [x0]
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3838
ret
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4040
.section .text
41-
.type hw_release_spin_lock,@function
41+
.type mcal_cpu_secure_release_spin_lock,@function
4242
.align 3
43-
.globl hw_release_spin_lock
43+
.globl mcal_cpu_secure_release_spin_lock
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45-
hw_release_spin_lock:
45+
mcal_cpu_secure_release_spin_lock:
4646
dmb ish
4747
stlr wzr, [x0]
4848
ret

‎ref_app/src/mcal/am6254_soc/mcal_eep.cpp‎

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///////////////////////////////////////////////////////////////////////////////
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
5+
// or copy at http://www.boost.org/LICENSE_1_0.txt)
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//
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8+
#include <mcal_eep.h>
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auto mcal::eep::write(const address_type addr, const std::uint8_t data) -> void
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{
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static_cast<void>(addr);
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static_cast<void>(data);
14+
}
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auto mcal::eep::read(const address_type addr) -> std::uint8_t
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{
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static_cast<void>(addr);
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return UINT8_C(0);
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}

‎ref_app/src/mcal/am6254_soc/mcal_eep.h‎

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///////////////////////////////////////////////////////////////////////////////
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// Copyright Christopher Kormanyos 2007 - 2022.
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
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// or copy at http://www.boost.org/LICENSE_1_0.txt)
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//
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#ifndef MCAL_EEP_2018_12_15_H_
9-
#define MCAL_EEP_2018_12_15_H_
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#ifndef MCAL_EEP_2018_12_15_H
9+
#define MCAL_EEP_2018_12_15_H
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#include <cstdint>
1212

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1717
using config_type = void;
1818
using address_type = std::uint32_t;
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20-
inline void init(const config_type*) { }
20+
inline auto init(const config_type*) -> void { }
2121

22-
inline void write(const address_type addr, const std::uint8_t data) { static_cast<void>(addr); static_cast<void>(data); }
23-
inline std::uint8_t read (const address_type addr) { static_cast<void>(addr); return UINT8_C(0); }
22+
auto write(const address_type addr, const std::uint8_t data) -> void;
23+
auto read (const address_type addr) -> std::uint8_t;
2424
}
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}
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#endif // MCAL_EEP_2018_12_15_H_
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#endif // MCAL_EEP_2018_12_15_H

‎ref_app/src/mcal/am6254_soc/mcal_irq.cpp‎

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///////////////////////////////////////////////////////////////////////////////
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
5+
// or copy at http://www.boost.org/LICENSE_1_0.txt)
6+
//
7+
8+
#include <mcal_irq.h>
9+
10+
auto mcal::irq::init(const config_type*) -> void
11+
{
12+
}

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