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[InstCombine] Regenerate test checks (NFC)
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-26
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2 files changed

+18
-26
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‎llvm/test/Transforms/InstCombine/X86/x86-sse4a-inseltpoison.ll

Lines changed: 9 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77

88
define <2 x i64> @test_extrq_call(<2 x i64> %x, <16 x i8> %y) {
99
; CHECK-LABEL: @test_extrq_call(
10-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1:#.*]]
10+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1:[0-9]+]]
1111
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
1212
;
1313
%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y) nounwind
@@ -150,7 +150,7 @@ define <2 x i64> @test_extrqi_call_constexpr() {
150150

151151
define <2 x i64> @test_insertq_call(<2 x i64> %x, <2 x i64> %y) {
152152
; CHECK-LABEL: @test_insertq_call(
153-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) [[ATTR1]]
153+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR1]]
154154
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
155155
;
156156
%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
@@ -291,7 +291,7 @@ define <2 x i64> @testUndefinedInsertq_3(<2 x i64> %v, <2 x i64> %i) {
291291

292292
define <2 x i64> @test_extrq_arg0(<2 x i64> %x, <16 x i8> %y) {
293293
; CHECK-LABEL: @test_extrq_arg0(
294-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
294+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1]]
295295
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
296296
;
297297
%1 = shufflevector <2 x i64> %x, <2 x i64> poison, <2 x i32> <i32 0, i32 0>
@@ -301,7 +301,7 @@ define <2 x i64> @test_extrq_arg0(<2 x i64> %x, <16 x i8> %y) {
301301

302302
define <2 x i64> @test_extrq_arg1(<2 x i64> %x, <16 x i8> %y) {
303303
; CHECK-LABEL: @test_extrq_arg1(
304-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
304+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1]]
305305
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
306306
;
307307
%1 = shufflevector <16 x i8> %y, <16 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
@@ -311,7 +311,7 @@ define <2 x i64> @test_extrq_arg1(<2 x i64> %x, <16 x i8> %y) {
311311

312312
define <2 x i64> @test_extrq_args01(<2 x i64> %x, <16 x i8> %y) {
313313
; CHECK-LABEL: @test_extrq_args01(
314-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
314+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1]]
315315
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
316316
;
317317
%1 = shufflevector <2 x i64> %x, <2 x i64> poison, <2 x i32> <i32 0, i32 0>
@@ -350,7 +350,7 @@ define <2 x i64> @test_extrqi_ret(<2 x i64> %x) {
350350

351351
define <2 x i64> @test_insertq_arg0(<2 x i64> %x, <2 x i64> %y) {
352352
; CHECK-LABEL: @test_insertq_arg0(
353-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) [[ATTR1]]
353+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR1]]
354354
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
355355
;
356356
%1 = shufflevector <2 x i64> %x, <2 x i64> poison, <2 x i32> <i32 0, i32 0>
@@ -369,7 +369,7 @@ define <2 x i64> @test_insertq_ret(<2 x i64> %x, <2 x i64> %y) {
369369

370370
define <2 x i64> @test_insertqi_arg0(<2 x i64> %x, <2 x i64> %y) {
371371
; CHECK-LABEL: @test_insertqi_arg0(
372-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
372+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #[[ATTR1]]
373373
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
374374
;
375375
%1 = shufflevector <2 x i64> %x, <2 x i64> poison, <2 x i32> <i32 0, i32 0>
@@ -379,7 +379,7 @@ define <2 x i64> @test_insertqi_arg0(<2 x i64> %x, <2 x i64> %y) {
379379

380380
define <2 x i64> @test_insertqi_arg1(<2 x i64> %x, <2 x i64> %y) {
381381
; CHECK-LABEL: @test_insertqi_arg1(
382-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
382+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #[[ATTR1]]
383383
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
384384
;
385385
%1 = shufflevector <2 x i64> %y, <2 x i64> poison, <2 x i32> <i32 0, i32 0>
@@ -389,7 +389,7 @@ define <2 x i64> @test_insertqi_arg1(<2 x i64> %x, <2 x i64> %y) {
389389

390390
define <2 x i64> @test_insertqi_args01(<2 x i64> %x, <2 x i64> %y) {
391391
; CHECK-LABEL: @test_insertqi_args01(
392-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
392+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #[[ATTR1]]
393393
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
394394
;
395395
%1 = shufflevector <2 x i64> %x, <2 x i64> poison, <2 x i32> <i32 0, i32 0>
@@ -407,14 +407,10 @@ define <2 x i64> @test_insertqi_ret(<2 x i64> %x, <2 x i64> %y) {
407407
ret <2 x i64> %2
408408
}
409409

410-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.extrq
411410
declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
412411

413-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.extrqi
414412
declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind
415413

416-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.insertq
417414
declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind
418415

419-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.insertqi
420416
declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind

‎llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll

Lines changed: 9 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77

88
define <2 x i64> @test_extrq_call(<2 x i64> %x, <16 x i8> %y) {
99
; CHECK-LABEL: @test_extrq_call(
10-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1:#.*]]
10+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1:[0-9]+]]
1111
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
1212
;
1313
%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y) nounwind
@@ -150,7 +150,7 @@ define <2 x i64> @test_extrqi_call_constexpr() {
150150

151151
define <2 x i64> @test_insertq_call(<2 x i64> %x, <2 x i64> %y) {
152152
; CHECK-LABEL: @test_insertq_call(
153-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) [[ATTR1]]
153+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR1]]
154154
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
155155
;
156156
%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
@@ -291,7 +291,7 @@ define <2 x i64> @testUndefinedInsertq_3(<2 x i64> %v, <2 x i64> %i) {
291291

292292
define <2 x i64> @test_extrq_arg0(<2 x i64> %x, <16 x i8> %y) {
293293
; CHECK-LABEL: @test_extrq_arg0(
294-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
294+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1]]
295295
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
296296
;
297297
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -301,7 +301,7 @@ define <2 x i64> @test_extrq_arg0(<2 x i64> %x, <16 x i8> %y) {
301301

302302
define <2 x i64> @test_extrq_arg1(<2 x i64> %x, <16 x i8> %y) {
303303
; CHECK-LABEL: @test_extrq_arg1(
304-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
304+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1]]
305305
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
306306
;
307307
%1 = shufflevector <16 x i8> %y, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
@@ -311,7 +311,7 @@ define <2 x i64> @test_extrq_arg1(<2 x i64> %x, <16 x i8> %y) {
311311

312312
define <2 x i64> @test_extrq_args01(<2 x i64> %x, <16 x i8> %y) {
313313
; CHECK-LABEL: @test_extrq_args01(
314-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) [[ATTR1]]
314+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR1]]
315315
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
316316
;
317317
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -350,7 +350,7 @@ define <2 x i64> @test_extrqi_ret(<2 x i64> %x) {
350350

351351
define <2 x i64> @test_insertq_arg0(<2 x i64> %x, <2 x i64> %y) {
352352
; CHECK-LABEL: @test_insertq_arg0(
353-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) [[ATTR1]]
353+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]]) #[[ATTR1]]
354354
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
355355
;
356356
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -369,7 +369,7 @@ define <2 x i64> @test_insertq_ret(<2 x i64> %x, <2 x i64> %y) {
369369

370370
define <2 x i64> @test_insertqi_arg0(<2 x i64> %x, <2 x i64> %y) {
371371
; CHECK-LABEL: @test_insertqi_arg0(
372-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
372+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #[[ATTR1]]
373373
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
374374
;
375375
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -379,7 +379,7 @@ define <2 x i64> @test_insertqi_arg0(<2 x i64> %x, <2 x i64> %y) {
379379

380380
define <2 x i64> @test_insertqi_arg1(<2 x i64> %x, <2 x i64> %y) {
381381
; CHECK-LABEL: @test_insertqi_arg1(
382-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
382+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #[[ATTR1]]
383383
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
384384
;
385385
%1 = shufflevector <2 x i64> %y, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -389,7 +389,7 @@ define <2 x i64> @test_insertqi_arg1(<2 x i64> %x, <2 x i64> %y) {
389389

390390
define <2 x i64> @test_insertqi_args01(<2 x i64> %x, <2 x i64> %y) {
391391
; CHECK-LABEL: @test_insertqi_args01(
392-
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) [[ATTR1]]
392+
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], i8 3, i8 2) #[[ATTR1]]
393393
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
394394
;
395395
%1 = shufflevector <2 x i64> %x, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
@@ -407,14 +407,10 @@ define <2 x i64> @test_insertqi_ret(<2 x i64> %x, <2 x i64> %y) {
407407
ret <2 x i64> %2
408408
}
409409

410-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.extrq
411410
declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
412411

413-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.extrqi
414412
declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind
415413

416-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.insertq
417414
declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind
418415

419-
; CHECK: declare <2 x i64> @llvm.x86.sse4a.insertqi
420416
declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind

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