Initial BLE support for SF32LB52#59
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gmarull merged 12 commits intocoredevices:mainfrom Jun 19, 2025
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Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
We just need the last 1K of RAM, but, because of MPU scripts assume ARMv7 MPU limitations (e.g. subregions), we need to sacrifice 32K now. This needs to be fixed. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: ganghe <ganghe@sifli.com> Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
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@gangheivt another question: https://github.com/coredevices/pebbleos-nonfree/blob/f94ae4d4b4d7d2c49a6912b6e77968bf15e5ed48/sf32lb52/lcpu_52x.c#L326-L422 contains the blob but also logic that should not be ther. Or, settings for LRC10K which may not always be desirable. This needs to be fixed after this PR.
Got it. |
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Signed-off-by: ganghe <ganghe@sifli.com> Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: ganghe <ganghe@sifli.com> Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Otherwise some configurations were not applied correctly due to some env races. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
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Based on #7