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Jun 9, 2025
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| /** | ||
| ****************************************************************************** | ||
| * @file ipc_os_port.h | ||
| * @author Sifli software development team | ||
| * @brief Sifli ipc hw interface | ||
| * @{ | ||
| ****************************************************************************** | ||
| */ | ||
| /* | ||
| * @attention | ||
| * Copyright (c) 2019 - 2022, Sifli Technology | ||
| * | ||
| * All rights reserved. | ||
| * | ||
| * Redistribution and use in source and binary forms, with or without modification, | ||
| * are permitted provided that the following conditions are met: | ||
| * | ||
| * 1. Redistributions of source code must retain the above copyright notice, this | ||
| * list of conditions and the following disclaimer. | ||
| * | ||
| * 2. Redistributions in binary form, except as embedded into a Sifli integrated circuit | ||
| * in a product or a software update for such product, must reproduce the above | ||
| * copyright notice, this list of conditions and the following disclaimer in the | ||
| * documentation and/or other materials provided with the distribution. | ||
| * | ||
| * 3. Neither the name of Sifli nor the names of its contributors may be used to endorse | ||
| * or promote products derived from this software without specific prior written permission. | ||
| * | ||
| * 4. This software, with or without modification, must only be used with a | ||
| * Sifli integrated circuit. | ||
| * | ||
| * 5. Any software provided in binary form under this license must not be reverse | ||
| * engineered, decompiled, modified and/or disassembled. | ||
| * | ||
| * THIS SOFTWARE IS PROVIDED BY SIFLI TECHNOLOGY "AS IS" AND ANY EXPRESS | ||
| * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | ||
| * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| * DISCLAIMED. IN NO EVENT SHALL SIFLI TECHNOLOGY OR CONTRIBUTORS BE | ||
| * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | ||
| * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE | ||
| * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
| * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
| * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
| * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| * | ||
| */ |
|
|
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| __STATIC_FORCEINLINE int os_interrupt_disable(void) | ||
| { | ||
| __disable_irq(); |
Member
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you likely want vPortEnterCritical ?
| return 0; | ||
| } | ||
|
|
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| #define os_interrupt_enable(mask) __enable_irq() |
third_party/hal_sifli/wscript
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| micro_sources += bld.path.ant_glob('SiFli-SDK/drivers/cmsis/sf32lb52x/bf0_pin_const.c') | ||
| micro_sources += bld.path.ant_glob('SiFli-SDK/drivers/cmsis/sf32lb52x/bf0_lcpu_init.c') | ||
| micro_sources += bld.path.ant_glob('SiFli-SDK/drivers/cmsis/sf32lb52x/lcpu_patch.c') | ||
| micro_sources += bld.path.ant_glob('SiFli-SDK/drivers/cmsis/sf32lb52x/lcpu_patch_rev_b.c') | ||
| micro_sources += bld.path.ant_glob('SiFli-SDK/drivers/cmsis/sf32lb52x/bt_rf_fulcal.c') | ||
| micro_sources += bld.path.ant_glob('SiFli-SDK/drivers/cmsis/sf32lb52x/bt_rf_cw_config.c') | ||
| micro_sources += bld.path.ant_glob('SiFli-SDK/drivers/cmsis/sf32lb52x/bt_power_config.c') | ||
| micro_sources += bld.path.ant_glob('SiFli-SDK/customer/boards/eh-lb52xu/*.c') | ||
| micro_includes = [ |
Member
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add sources to the list above, so diff is readable, it has all been shuffled now.
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| portDISABLE_INTERRUPTS(); | ||
| HAL_DBG_printf("%s, %s %d\n", hci_type_str(type), host2ctrl?"TX":"RX", len); | ||
| HAL_DBG_print_data((char*)data,0,len); | ||
| portENABLE_INTERRUPTS(); |
Member
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doesn't seem safe, as console is owned by the OS.
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| #include <stdint.h> | ||
| #include <string.h> | ||
| #include "mem_map.h" | ||
| #include "rtconfig.h" | ||
| #include "register.h" |
Author
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This is generated one, not just for this project.
Member
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how is this generated? is this publicly available to add some references?
third_party/nimble/wscript
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| nimble_includes = [ | ||
| 'port/include/cc2564x', | ||
| ] + nimble_includes |
Member
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a new port config has to be created, replicate cc2564x setup with sf32lb52
third_party/wscript
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| ctx.recurse('nimble') | ||
| ctx.recurse('ti_bt_sp') | ||
| elif ctx.env.bt_controller == 'nrf52': | ||
| elif ctx.env.bt_controller == 'nrf52' or ctx.env.bt_controller == 'sf32lb52': |
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| int r=bt_mac_addr_generate_via_uid_v2(&(g_ble_slp_default_rc10k[2])); | ||
| uint8_t *nvds_addr = (uint8_t *)NVDS_BUFF_START;//0x204FFD00; | ||
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| *(uint32_t *)nvds_addr = 0x4E564453; | ||
| *(uint16_t *)(nvds_addr+4) = sizeof(g_ble_slp_default_rc10k); | ||
| *(uint16_t *)(nvds_addr+6) = 0; | ||
| memcpy((void*)(nvds_addr+8), g_ble_slp_default_rc10k, sizeof(g_ble_slp_default_rc10k)); | ||
| HAL_DBG_printf("add: %d\r", r); | ||
| HAL_DBG_print_data((char *)nvds_addr, 0, 8+sizeof(g_ble_slp_default_rc10k)); |
Member
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magic number/offsets, they need to be defined. code needs to be generic so we can operate on LXT32 or RC10K.
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| memcpy((void *)addr, (void *)&uid[0], 6); | ||
| if (use_v2) | ||
| { | ||
| result = 0; | ||
| } | ||
| else | ||
| result = -5; |
Member
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in general: run clang-format on these files.
Member
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also: make sure to add changes in smaller chunks (see obelix PR as an example). |
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