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Primitive version of objdump#29

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snim2 wants to merge 3 commits intocornell-brg:masterfrom
futurecore:debug-help
Open

Primitive version of objdump#29
snim2 wants to merge 3 commits intocornell-brg:masterfrom
futurecore:debug-help

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@snim2 snim2 commented Jul 20, 2015

I've been thinking about ways to make debugging a Pydgin simulator a little easier (and by a small coincidence, procrastinating over debugging my own simulator).

This PR adds a -o or --objdump option to a simulator, which loads an ELF file and prints a disassembled version of that ELF file to STDOUT. The idea is to emulate GNU objdump.

For example:

$ python mysimulator/sim.py -o epiphany/test/c/hello.elf
NOTE: Using sparse storage
sparse memory size 400 addr mask 3ff block mask fffffc00
epiphany/test/c/hello.elf
Start address: 0

SECTIONS:
Idx Name           Addr     Size
  0 ivt_reset      00000000 4
  1 .reserved_crt0 00000058 12
 ...
 13 .bss           000002f8 72
None

00000000 <ivt_reset>:
00000000:       2ce8 0000       bcond32

00000058 <.reserved_crt0>:
00000058:       720b 0002       movimm32
0000005c:       600b 1002       movtimm32
00000060:       0d52 0000       jalr16
...

Symbol tables and section tables are printed. Headers are not. Mixed 16- and 32-bit instruction widths are catered for, but only if each instruction is decoded to a string which contains its width (e.g. jalr16 and movimm32 above).

As a comparison, this is a small section from an ELF file, decompiled with Pydgin:

00000064 <.init>:
00000064:       d65c 2700       ldstrpmd32
00000068:       1e8b 0012       movimm32
0000006c:       000b 1002       movtimm32
00000070:       0152 0000       jalr16
00000072:       0c0b 0022       movimm32
00000076:       000b 1002       movtimm32
0000007a:       0152 0000       jalr16
0000007c:       d64c 2400       ldstrdisp32
00000080:       b41b 2402       add32
00000084:       194f 0402       jr32

and GNU objdump displays the same section as:

00000064 <init>:
  64:   d65c 2700   str lr,[sp],-0x4
  68:   1e8b 0012   mov r0,0x1f4
  6c:   000b 1002   movt r0,0x0
  70:   0152        jalr r0
  72:   0c0b 0022   mov r0,0x260
  76:   000b 1002   movt r0,0x0
  7a:   0152        jalr r0
  7c:   d64c 2400   ldr lr,[sp,+0x4]
  80:   b41b 2402   add sp,sp,16
  84:   194f 0402   rts

snim2 added 2 commits July 20, 2015 17:59
… section table, symbol table and data to STDOUT. Assume data is little endian. Don't print more than one zero in a section full of zeroes.

Little Endian
… and 32 bit instructions. Instruction string should end in 16 if the instruction only takes 16 bits to encode.
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snim2 commented Jul 20, 2015

Looking at this again, it isn't quite ready to merge. Lines 342 and 347 which use the struct module should be replaced with a call to an rpython.rlib function when translated.

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snim2 commented Jul 21, 2015

OK, made the relevant changes, but this should probably be tested before merging.

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