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Merge tag 'qcom-arm64-for-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
A few more Qualcomm Arm64 DeviceTree updates for v6.10 This corrects the obviously broken compatible of the USB VBUS regulator in PM6150. It clears the odd-looking default address on QCS404 EVB, with the expectation that a proper address is provides by other means. The newly added SM8650 GPU node is corrected with a missing memory region. The third DWC3 instance on SC8280XP is added, and enabled on Lenovo Thinkpad X13s to give working fingerprint sensor. * tag 'qcom-arm64-for-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: pm6150: correct USB VBUS regulator compatible arm64: dts: qcom: qcs404: fix bluetooth device address arm64: dts: qcom: sc8280xp-x13s: enable USB MP and fingerprint reader arm64: dts: qcom: sc8280xp: Add USB DWC3 Multiport controller arm64: dts: qcom: sm8650: Fix GPU cx_mem size Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents f89d224 + 0ea3e1d commit 0cb7e0c

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‎arch/arm64/boot/dts/qcom/pm6150.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,8 +64,8 @@
6464
};
6565

6666
pm6150_vbus: usb-vbus-regulator@1100 {
67-
compatible = "qcom,pm6150-vbus-reg,
68-
qcom,pm8150b-vbus-reg";
67+
compatible = "qcom,pm6150-vbus-reg",
68+
"qcom,pm8150b-vbus-reg";
6969
reg = <0x1100>;
7070
status = "disabled";
7171
};

‎arch/arm64/boot/dts/qcom/qcs404-evb.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -62,7 +62,7 @@
6262
vddrf-supply = <&vreg_l1_1p3>;
6363
vddch0-supply = <&vdd_ch0_3p3>;
6464

65-
local-bd-address = [ 02 00 00 00 5a ad ];
65+
local-bd-address = [ 00 00 00 00 00 00 ];
6666

6767
max-speed = <3200000>;
6868
};

‎arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts‎

Lines changed: 85 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -416,6 +416,13 @@
416416
regulator-always-on;
417417
};
418418

419+
vreg_l1b: ldo1 {
420+
regulator-name = "vreg_l1b";
421+
regulator-min-microvolt = <912000>;
422+
regulator-max-microvolt = <912000>;
423+
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
424+
};
425+
419426
vreg_l3b: ldo3 {
420427
regulator-name = "vreg_l3b";
421428
regulator-min-microvolt = <1200000>;
@@ -466,6 +473,13 @@
466473
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
467474
};
468475

476+
vreg_l8c: ldo8 {
477+
regulator-name = "vreg_l8c";
478+
regulator-min-microvolt = <1800000>;
479+
regulator-max-microvolt = <1800000>;
480+
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
481+
};
482+
469483
vreg_l12c: ldo12 {
470484
regulator-name = "vreg_l12c";
471485
regulator-min-microvolt = <1800000>;
@@ -499,6 +513,13 @@
499513
vdd-l6-l9-l10-supply = <&vreg_s12b>;
500514
vdd-l8-supply = <&vreg_s12b>;
501515

516+
vreg_l2d: ldo2 {
517+
regulator-name = "vreg_l2d";
518+
regulator-min-microvolt = <3072000>;
519+
regulator-max-microvolt = <3072000>;
520+
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
521+
};
522+
502523
vreg_l3d: ldo3 {
503524
regulator-name = "vreg_l3d";
504525
regulator-min-microvolt = <1200000>;
@@ -527,12 +548,26 @@
527548
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
528549
};
529550

551+
vreg_l8d: ldo8 {
552+
regulator-name = "vreg_l8d";
553+
regulator-min-microvolt = <912000>;
554+
regulator-max-microvolt = <912000>;
555+
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
556+
};
557+
530558
vreg_l9d: ldo9 {
531559
regulator-name = "vreg_l9d";
532560
regulator-min-microvolt = <912000>;
533561
regulator-max-microvolt = <912000>;
534562
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
535563
};
564+
565+
vreg_l10d: ldo10 {
566+
regulator-name = "vreg_l10d";
567+
regulator-min-microvolt = <912000>;
568+
regulator-max-microvolt = <912000>;
569+
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
570+
};
536571
};
537572
};
538573

@@ -1162,6 +1197,56 @@
11621197
remote-endpoint = <&pmic_glink_con1_hs>;
11631198
};
11641199

1200+
&usb_2 {
1201+
status = "okay";
1202+
};
1203+
1204+
&usb_2_hsphy0 {
1205+
vdda-pll-supply = <&vreg_l1b>;
1206+
vdda18-supply = <&vreg_l1c>;
1207+
vdda33-supply = <&vreg_l7d>;
1208+
1209+
status = "okay";
1210+
};
1211+
1212+
&usb_2_hsphy1 {
1213+
vdda-pll-supply = <&vreg_l8d>;
1214+
vdda18-supply = <&vreg_l1c>;
1215+
vdda33-supply = <&vreg_l7d>;
1216+
1217+
status = "okay";
1218+
};
1219+
1220+
&usb_2_hsphy2 {
1221+
vdda-pll-supply = <&vreg_l10d>;
1222+
vdda18-supply = <&vreg_l8c>;
1223+
vdda33-supply = <&vreg_l2d>;
1224+
1225+
status = "okay";
1226+
};
1227+
1228+
&usb_2_hsphy3 {
1229+
vdda-pll-supply = <&vreg_l10d>;
1230+
vdda18-supply = <&vreg_l8c>;
1231+
vdda33-supply = <&vreg_l2d>;
1232+
1233+
status = "okay";
1234+
};
1235+
1236+
&usb_2_qmpphy0 {
1237+
vdda-phy-supply = <&vreg_l1b>;
1238+
vdda-pll-supply = <&vreg_l4d>;
1239+
1240+
status = "okay";
1241+
};
1242+
1243+
&usb_2_qmpphy1 {
1244+
vdda-phy-supply = <&vreg_l8d>;
1245+
vdda-pll-supply = <&vreg_l4d>;
1246+
1247+
status = "okay";
1248+
};
1249+
11651250
&vamacro {
11661251
pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
11671252
pinctrl-names = "default";

‎arch/arm64/boot/dts/qcom/sc8280xp.dtsi‎

Lines changed: 82 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3423,6 +3423,88 @@
34233423
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
34243424
};
34253425

3426+
usb_2: usb@a4f8800 {
3427+
compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";
3428+
reg = <0 0x0a4f8800 0 0x400>;
3429+
#address-cells = <2>;
3430+
#size-cells = <2>;
3431+
ranges;
3432+
3433+
clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
3434+
<&gcc GCC_USB30_MP_MASTER_CLK>,
3435+
<&gcc GCC_AGGRE_USB3_MP_AXI_CLK>,
3436+
<&gcc GCC_USB30_MP_SLEEP_CLK>,
3437+
<&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
3438+
<&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
3439+
<&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
3440+
<&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
3441+
<&gcc GCC_SYS_NOC_USB_AXI_CLK>;
3442+
clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
3443+
"noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
3444+
3445+
assigned-clocks = <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
3446+
<&gcc GCC_USB30_MP_MASTER_CLK>;
3447+
assigned-clock-rates = <19200000>, <200000000>;
3448+
3449+
interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
3450+
<&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
3451+
<&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,
3452+
<&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>,
3453+
<&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
3454+
<&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
3455+
<&intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>,
3456+
<&intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH>,
3457+
<&pdc 127 IRQ_TYPE_EDGE_BOTH>,
3458+
<&pdc 126 IRQ_TYPE_EDGE_BOTH>,
3459+
<&pdc 129 IRQ_TYPE_EDGE_BOTH>,
3460+
<&pdc 128 IRQ_TYPE_EDGE_BOTH>,
3461+
<&pdc 131 IRQ_TYPE_EDGE_BOTH>,
3462+
<&pdc 130 IRQ_TYPE_EDGE_BOTH>,
3463+
<&pdc 133 IRQ_TYPE_EDGE_BOTH>,
3464+
<&pdc 132 IRQ_TYPE_EDGE_BOTH>,
3465+
<&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
3466+
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
3467+
3468+
interrupt-names = "pwr_event_1", "pwr_event_2",
3469+
"pwr_event_3", "pwr_event_4",
3470+
"hs_phy_1", "hs_phy_2",
3471+
"hs_phy_3", "hs_phy_4",
3472+
"dp_hs_phy_1", "dm_hs_phy_1",
3473+
"dp_hs_phy_2", "dm_hs_phy_2",
3474+
"dp_hs_phy_3", "dm_hs_phy_3",
3475+
"dp_hs_phy_4", "dm_hs_phy_4",
3476+
"ss_phy_1", "ss_phy_2";
3477+
3478+
power-domains = <&gcc USB30_MP_GDSC>;
3479+
required-opps = <&rpmhpd_opp_nom>;
3480+
3481+
resets = <&gcc GCC_USB30_MP_BCR>;
3482+
3483+
interconnects = <&aggre1_noc MASTER_USB3_MP 0 &mc_virt SLAVE_EBI1 0>,
3484+
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_MP 0>;
3485+
interconnect-names = "usb-ddr", "apps-usb";
3486+
3487+
wakeup-source;
3488+
3489+
status = "disabled";
3490+
3491+
usb_2_dwc3: usb@a400000 {
3492+
compatible = "snps,dwc3";
3493+
reg = <0 0x0a400000 0 0xcd00>;
3494+
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
3495+
iommus = <&apps_smmu 0x800 0x0>;
3496+
phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,
3497+
<&usb_2_hsphy1>, <&usb_2_qmpphy1>,
3498+
<&usb_2_hsphy2>,
3499+
<&usb_2_hsphy3>;
3500+
phy-names = "usb2-0", "usb3-0",
3501+
"usb2-1", "usb3-1",
3502+
"usb2-2",
3503+
"usb2-3";
3504+
dr_mode = "host";
3505+
};
3506+
};
3507+
34263508
usb_0: usb@a6f8800 {
34273509
compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";
34283510
reg = <0 0x0a6f8800 0 0x400>;

‎arch/arm64/boot/dts/qcom/sm8650.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2614,7 +2614,7 @@
26142614
gpu: gpu@3d00000 {
26152615
compatible = "qcom,adreno-43051401", "qcom,adreno";
26162616
reg = <0x0 0x03d00000 0x0 0x40000>,
2617-
<0x0 0x03d9e000 0x0 0x1000>,
2617+
<0x0 0x03d9e000 0x0 0x2000>,
26182618
<0x0 0x03d61000 0x0 0x800>;
26192619
reg-names = "kgsl_3d0_reg_memory",
26202620
"cx_mem",

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