Skip to content

Commit d2a80cb

Browse files
cristiccmmind
authored andcommitted
drm/rockchip: dw_hdmi: Simplify clock handling
Make use of devm_clk_get_optional_enabled() to replace devm_clk_get() and clk_prepare_enable() for ref_clk and drop the now unnecessary calls to clk_disable_unprepare(). Additionally, use devm_clk_get_optional() helper for grf_clk to replace the open coding call to devm_clk_get() followed by the -ENOENT test. Signed-off-by: Cristian Ciocaltea <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240813-dw-hdmi-rockchip-cleanup-v1-2-b3e73b5f4fd6@collabora.com
1 parent 1b8f576 commit d2a80cb

File tree

1 file changed

+14
-24
lines changed

1 file changed

+14
-24
lines changed

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

Lines changed: 14 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -209,32 +209,31 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
209209
static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
210210
{
211211
struct device_node *np = hdmi->dev->of_node;
212+
int ret;
212213

213214
hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
214215
if (IS_ERR(hdmi->regmap)) {
215216
drm_err(hdmi, "Unable to get rockchip,grf\n");
216217
return PTR_ERR(hdmi->regmap);
217218
}
218219

219-
hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "ref");
220+
hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "ref");
220221
if (!hdmi->ref_clk)
221-
hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "vpll");
222+
hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "vpll");
222223

223-
if (PTR_ERR(hdmi->ref_clk) == -EPROBE_DEFER) {
224-
return -EPROBE_DEFER;
225-
} else if (IS_ERR(hdmi->ref_clk)) {
226-
drm_err(hdmi, "failed to get reference clock\n");
227-
return PTR_ERR(hdmi->ref_clk);
224+
if (IS_ERR(hdmi->ref_clk)) {
225+
ret = PTR_ERR(hdmi->ref_clk);
226+
if (ret != -EPROBE_DEFER)
227+
drm_err(hdmi, "failed to get reference clock\n");
228+
return ret;
228229
}
229230

230-
hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf");
231-
if (PTR_ERR(hdmi->grf_clk) == -ENOENT) {
232-
hdmi->grf_clk = NULL;
233-
} else if (PTR_ERR(hdmi->grf_clk) == -EPROBE_DEFER) {
234-
return -EPROBE_DEFER;
235-
} else if (IS_ERR(hdmi->grf_clk)) {
236-
drm_err(hdmi, "failed to get grf clock\n");
237-
return PTR_ERR(hdmi->grf_clk);
231+
hdmi->grf_clk = devm_clk_get_optional(hdmi->dev, "grf");
232+
if (IS_ERR(hdmi->grf_clk)) {
233+
ret = PTR_ERR(hdmi->grf_clk);
234+
if (ret != -EPROBE_DEFER)
235+
drm_err(hdmi, "failed to get grf clock\n");
236+
return ret;
238237
}
239238

240239
hdmi->avdd_0v9 = devm_regulator_get(hdmi->dev, "avdd-0v9");
@@ -615,12 +614,6 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
615614
goto err_avdd_1v8;
616615
}
617616

618-
ret = clk_prepare_enable(hdmi->ref_clk);
619-
if (ret) {
620-
drm_err(hdmi, "Failed to enable HDMI reference clock: %d\n", ret);
621-
goto err_clk;
622-
}
623-
624617
if (hdmi->chip_data == &rk3568_chip_data) {
625618
regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1,
626619
HIWORD_UPDATE(RK3568_HDMI_SDAIN_MSK |
@@ -649,8 +642,6 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
649642

650643
err_bind:
651644
drm_encoder_cleanup(encoder);
652-
clk_disable_unprepare(hdmi->ref_clk);
653-
err_clk:
654645
regulator_disable(hdmi->avdd_1v8);
655646
err_avdd_1v8:
656647
regulator_disable(hdmi->avdd_0v9);
@@ -665,7 +656,6 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
665656

666657
dw_hdmi_unbind(hdmi->hdmi);
667658
drm_encoder_cleanup(&hdmi->encoder.encoder);
668-
clk_disable_unprepare(hdmi->ref_clk);
669659

670660
regulator_disable(hdmi->avdd_1v8);
671661
regulator_disable(hdmi->avdd_0v9);

0 commit comments

Comments
 (0)