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Ajit Pandeyandersson
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clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for LUCID EVO PLL
In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL register using regmap_write() API in __alpha_pll_trion_set_rate callback will override LUCID EVO PLL initial configuration related to PLL_CAL_L_VAL bit fields in PLL_L_VAL register. Observed random PLL lock failures during PLL enable due to such override in PLL calibration value. Use regmap_update_bits() with L_VAL bitfield mask instead of regmap_write() API to update only PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback. Fixes: 260e366 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces") Cc: [email protected] Signed-off-by: Ajit Pandey <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Acked-by: Vladimir Zapolskiy <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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drivers/clk/qcom/clk-alpha-pll.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1712,7 +1712,7 @@ static int __alpha_pll_trion_set_rate(struct clk_hw *hw, unsigned long rate,
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if (ret < 0)
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return ret;
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1715-
regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
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regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK, l);
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regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
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/* Latch the PLL input */

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