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[vm, compiler] Use immediate forms for BinaryUint32Op.
dart2js.aot.arm64 28757440 -> 28691320 (-66k) dart2js.aot.x64 28311232 -> 28310536 (-1k) dart2js.aot.rv64 27971912 -> 27955200 (-16k) dart2js.aot.arm32 27793504 -> 27775936 (-17k) TEST=vm/dart/uint32_op_imm_test Change-Id: I25e486ea1ab3b20369c0c5a5fafae5d1ea53b1c7 Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/388120 Reviewed-by: Alexander Markov <[email protected]> Commit-Queue: Ryan Macnak <[email protected]>
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‎runtime/tests/vm/dart/uint32_op_imm_test.dart‎

Lines changed: 283 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,283 @@
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// Copyright (c) 2024, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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import "dart:typed_data";
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@pragma("vm:never-inline")
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void and1(Uint32List list) {
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list[0] &= 1;
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}
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@pragma("vm:never-inline")
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void or1(Uint32List list) {
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list[0] |= 1;
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}
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@pragma("vm:never-inline")
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void xor1(Uint32List list) {
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list[0] ^= 1;
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}
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@pragma("vm:never-inline")
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void add1(Uint32List list) {
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list[0] += 1;
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}
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@pragma("vm:never-inline")
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void sub1(Uint32List list) {
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list[0] -= 1;
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}
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@pragma("vm:never-inline")
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void mul1(Uint32List list) {
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list[0] *= 1;
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}
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@pragma("vm:never-inline")
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void and2(Uint32List list) {
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list[0] &= 2;
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}
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@pragma("vm:never-inline")
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void or2(Uint32List list) {
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list[0] |= 2;
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}
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@pragma("vm:never-inline")
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void xor2(Uint32List list) {
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list[0] ^= 2;
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}
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@pragma("vm:never-inline")
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void add2(Uint32List list) {
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list[0] += 2;
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}
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@pragma("vm:never-inline")
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void sub2(Uint32List list) {
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list[0] -= 2;
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}
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@pragma("vm:never-inline")
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void mul2(Uint32List list) {
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list[0] *= 2;
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}
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@pragma("vm:never-inline")
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void and7(Uint32List list) {
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list[0] &= 7;
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}
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@pragma("vm:never-inline")
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void or7(Uint32List list) {
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list[0] |= 7;
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}
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@pragma("vm:never-inline")
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void xor7(Uint32List list) {
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list[0] ^= 7;
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}
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@pragma("vm:never-inline")
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void add7(Uint32List list) {
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list[0] += 7;
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}
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@pragma("vm:never-inline")
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void sub7(Uint32List list) {
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list[0] -= 7;
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}
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@pragma("vm:never-inline")
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void mul7(Uint32List list) {
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list[0] *= 7;
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}
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@pragma("vm:never-inline")
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void andH(Uint32List list) {
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list[0] &= 0x7FFFFFF;
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}
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@pragma("vm:never-inline")
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void orH(Uint32List list) {
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list[0] |= 0x7FFFFFF;
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}
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@pragma("vm:never-inline")
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void xorH(Uint32List list) {
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list[0] ^= 0x7FFFFFF;
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}
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@pragma("vm:never-inline")
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void addH(Uint32List list) {
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list[0] += 0x7FFFFFF;
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}
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@pragma("vm:never-inline")
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void subH(Uint32List list) {
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list[0] -= 0x7FFFFFF;
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}
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@pragma("vm:never-inline")
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void mulH(Uint32List list) {
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list[0] *= 0x7FFFFFF;
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}
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expect(int observed, int expected) {
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if (observed != expected) {
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throw "0x${observed.toRadixString(16)}";
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}
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}
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main() {
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Uint32List u32 = Uint32List(1);
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u32[0] = 0x12345678;
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and1(u32);
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expect(u32[0], 0);
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u32[0] = 0x87654321;
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and1(u32);
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expect(u32[0], 1);
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u32[0] = 0x12345678;
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or1(u32);
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expect(u32[0], 0x12345679);
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u32[0] = 0x87654321;
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or1(u32);
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expect(u32[0], 0x87654321);
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u32[0] = 0x12345678;
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xor1(u32);
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expect(u32[0], 0x12345679);
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u32[0] = 0x87654321;
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xor1(u32);
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expect(u32[0], 0x87654320);
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u32[0] = 0x12345678;
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add1(u32);
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expect(u32[0], 0x12345679);
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u32[0] = 0x87654321;
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add1(u32);
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expect(u32[0], 0x87654322);
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u32[0] = 0x12345678;
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sub1(u32);
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expect(u32[0], 0x12345677);
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u32[0] = 0x87654321;
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sub1(u32);
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expect(u32[0], 0x87654320);
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u32[0] = 0x12345678;
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mul1(u32);
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expect(u32[0], 0x12345678);
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u32[0] = 0x87654321;
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mul1(u32);
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expect(u32[0], 0x87654321);
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u32[0] = 0x12345678;
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and2(u32);
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expect(u32[0], 0);
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u32[0] = 0x87654321;
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and2(u32);
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expect(u32[0], 0);
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u32[0] = 0x12345678;
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or2(u32);
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expect(u32[0], 0x1234567a);
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u32[0] = 0x87654321;
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or2(u32);
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expect(u32[0], 0x87654323);
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u32[0] = 0x12345678;
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xor2(u32);
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expect(u32[0], 0x1234567a);
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u32[0] = 0x87654321;
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xor2(u32);
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expect(u32[0], 0x87654323);
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u32[0] = 0x12345678;
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add2(u32);
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expect(u32[0], 0x1234567a);
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u32[0] = 0x87654321;
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add2(u32);
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expect(u32[0], 0x87654323);
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u32[0] = 0x12345678;
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sub2(u32);
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expect(u32[0], 0x12345676);
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u32[0] = 0x87654321;
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sub2(u32);
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expect(u32[0], 0x8765431f);
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u32[0] = 0x12345678;
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mul2(u32);
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expect(u32[0], 0x2468acf0);
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u32[0] = 0x87654321;
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mul2(u32);
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expect(u32[0], 0x0eca8642);
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u32[0] = 0x12345678;
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and7(u32);
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expect(u32[0], 0);
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u32[0] = 0x87654321;
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and7(u32);
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expect(u32[0], 1);
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u32[0] = 0x12345678;
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or7(u32);
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expect(u32[0], 0x1234567f);
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u32[0] = 0x87654321;
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or7(u32);
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expect(u32[0], 0x87654327);
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u32[0] = 0x12345678;
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xor7(u32);
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expect(u32[0], 0x1234567f);
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u32[0] = 0x87654321;
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xor7(u32);
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expect(u32[0], 0x87654326);
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u32[0] = 0x12345678;
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add7(u32);
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expect(u32[0], 0x1234567f);
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u32[0] = 0x87654321;
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add7(u32);
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expect(u32[0], 0x87654328);
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u32[0] = 0x12345678;
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sub7(u32);
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expect(u32[0], 0x12345671);
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u32[0] = 0x87654321;
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sub7(u32);
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expect(u32[0], 0x8765431a);
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u32[0] = 0x12345678;
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mul7(u32);
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expect(u32[0], 0x7f6e5d48);
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u32[0] = 0x87654321;
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mul7(u32);
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expect(u32[0], 0xb3c4d5e7);
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u32[0] = 0x12345678;
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andH(u32);
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expect(u32[0], 0x02345678);
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u32[0] = 0x87654321;
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andH(u32);
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expect(u32[0], 0x07654321);
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u32[0] = 0x12345678;
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orH(u32);
255+
expect(u32[0], 0x17ffffff);
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u32[0] = 0x87654321;
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orH(u32);
258+
expect(u32[0], 0x87ffffff);
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u32[0] = 0x12345678;
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xorH(u32);
261+
expect(u32[0], 0x15cba987);
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u32[0] = 0x87654321;
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xorH(u32);
264+
expect(u32[0], 0x809abcde);
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u32[0] = 0x12345678;
266+
addH(u32);
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expect(u32[0], 0x1a345677);
268+
u32[0] = 0x87654321;
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addH(u32);
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expect(u32[0], 0x8f654320);
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u32[0] = 0x12345678;
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subH(u32);
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expect(u32[0], 0x0a345679);
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u32[0] = 0x87654321;
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subH(u32);
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expect(u32[0], 0x7f654322);
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u32[0] = 0x12345678;
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mulH(u32);
279+
expect(u32[0], 0xadcba988);
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u32[0] = 0x87654321;
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mulH(u32);
282+
expect(u32[0], 0x809abcdf);
283+
}

‎runtime/vm/compiler/assembler/assembler_arm.cc‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3107,6 +3107,19 @@ void Assembler::OrImmediate(Register rd,
31073107
}
31083108
}
31093109

3110+
void Assembler::XorImmediate(Register rd,
3111+
Register rs,
3112+
int32_t imm,
3113+
Condition cond) {
3114+
Operand o;
3115+
if (Operand::CanHold(imm, &o)) {
3116+
eor(rd, rs, Operand(o), cond);
3117+
} else {
3118+
LoadImmediate(TMP, imm, cond);
3119+
eor(rd, rs, Operand(TMP), cond);
3120+
}
3121+
}
3122+
31103123
void Assembler::CompareImmediate(Register rn, int32_t value, Condition cond) {
31113124
Operand o;
31123125
if (Operand::CanHold(value, &o)) {

‎runtime/vm/compiler/assembler/assembler_arm.h‎

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -863,12 +863,18 @@ class Assembler : public AssemblerBase {
863863
void MulImmediate(Register reg,
864864
int32_t imm,
865865
OperandSize width = kFourBytes) override {
866+
MulImmediate(reg, reg, imm, width);
867+
}
868+
void MulImmediate(Register rd,
869+
Register rn,
870+
int32_t imm,
871+
OperandSize width = kFourBytes) {
866872
ASSERT(width == kFourBytes);
867873
if (Utils::IsPowerOfTwo(imm)) {
868-
LslImmediate(reg, Utils::ShiftForPowerOfTwo(imm));
874+
LslImmediate(rd, rn, Utils::ShiftForPowerOfTwo(imm));
869875
} else {
870876
LoadImmediate(TMP, imm);
871-
mul(reg, reg, TMP);
877+
mul(rd, rn, TMP);
872878
}
873879
}
874880
void AndImmediate(Register rd,
@@ -913,6 +919,7 @@ class Assembler : public AssemblerBase {
913919
void OrImmediate(Register rd, int32_t imm, Condition cond = AL) {
914920
OrImmediate(rd, rd, imm, cond);
915921
}
922+
void XorImmediate(Register rd, Register rn, int32_t imm, Condition cond = AL);
916923
void LslImmediate(Register rd,
917924
Register rn,
918925
int32_t shift,

‎runtime/vm/compiler/assembler/assembler_arm64.h‎

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1805,15 +1805,21 @@ class Assembler : public AssemblerBase {
18051805
void MulImmediate(Register reg,
18061806
int64_t imm,
18071807
OperandSize width = kEightBytes) override {
1808+
MulImmediate(reg, reg, imm, width);
1809+
}
1810+
void MulImmediate(Register dest,
1811+
Register rn,
1812+
int64_t imm,
1813+
OperandSize width = kEightBytes) {
18081814
ASSERT(width == kFourBytes || width == kEightBytes);
18091815
if (Utils::IsPowerOfTwo(imm)) {
1810-
LslImmediate(reg, Utils::ShiftForPowerOfTwo(imm), width);
1816+
LslImmediate(dest, rn, Utils::ShiftForPowerOfTwo(imm), width);
18111817
} else {
18121818
LoadImmediate(TMP, imm);
18131819
if (width == kFourBytes) {
1814-
mulw(reg, reg, TMP);
1820+
mulw(dest, rn, TMP);
18151821
} else {
1816-
mul(reg, reg, TMP);
1822+
mul(dest, rn, TMP);
18171823
}
18181824
}
18191825
}

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