pre-commit: PR127390

[dtcxzyw]

Link: llvm/llvm-project#127390
Requested by: @dtcxzyw

[dtcxzyw]

runner: ariselab-64c-v2
baseline: llvm/llvm-project@b55f751
patch: llvm/llvm-project#127390
sha256: 2f53cc7a44b5007a8cfb7b2c3ae6a12d643613c71bab144511d5060a6869cbf0
commit: b1e1e28

169 files changed, 45991 insertions(+), 46059 deletions(-)

Improvements:
  licm.NumBOAssociationsHoisted 5730 -> 5732 +0.03%
  reassociate.NumChanged 4261827 -> 4262050 +0.01%
  correlated-value-propagation.NumSExt 37963 -> 37964 +0.00%
  correlated-value-propagation.NumShlNUW 125792 -> 125795 +0.00%
  correlated-value-propagation.NumAddNUW 180386 -> 180390 +0.00%
  simplifycfg.NumSinkCommonInstrs 699059 -> 699074 +0.00%
  correlated-value-propagation.NumNUW 376540 -> 376547 +0.00%
  correlated-value-propagation.NumAddNW 394514 -> 394521 +0.00%
  instcombine.NumDeadInst 33137689 -> 33138184 +0.00%
  correlated-value-propagation.NumSubNSW 70477 -> 70478 +0.00%
Regressions:
  indvars.NumElimIdentity 1713 -> 1710 -0.18%
  bdce.NumSimplified 5738 -> 5735 -0.05%
  aggressive-instcombine.NumInstrsReduced 58990 -> 58973 -0.03%
  aggressive-instcombine.NumExprsReduced 19195 -> 19190 -0.03%
  correlated-value-propagation.NumAnd 37417 -> 37416 -0.00%
  instcombine.NumReassoc 255244 -> 255240 -0.00%
  instsimplify.NumExpand 139761 -> 139759 -0.00%
  simple-loop-unswitch.NumBranches 82251 -> 82250 -0.00%
  adce.NumRemoved 90683 -> 90682 -0.00%
  loop-delete.NumDeleted 144882 -> 144881 -0.00%

3 2 bench/boost/optimized/approximately_equals.ll
1 1 bench/boost/optimized/src.ll
2 2 bench/ceres/optimized/polynomial.ll
1 2 bench/clamav/optimized/scantree.ll
3 3 bench/cmake/optimized/cmCTestTestHandler.ll
3 4 bench/coreutils-rs/optimized/2i3dvgzkmy2gn6v1.ll
4 4 bench/coreutils-rs/optimized/2pqvixtdp9wizsl2.ll
99 99 bench/coreutils-rs/optimized/3wh0yla9idangd55.ll
31 35 bench/curl/optimized/tool_getparam.ll
3 4 bench/gromacs/optimized/kernel_gpu_ref.ll
5 5 bench/grpc/optimized/outlier_detection.ll
1 1 bench/jemalloc/optimized/sc.ll
4 4 bench/libquic/optimized/quic_framer.ll
2 2 bench/libquic/optimized/quic_session.ll
2 2 bench/libquic/optimized/quic_unacked_packet_map.ll
24 21 bench/libzmq/optimized/zmq.ll
4 3 bench/llvm/optimized/HeaderIncludeGen.ll
14 16 bench/llvm/optimized/MicrosoftCXXABI.ll
33 39 bench/llvm/optimized/ModuleSummaryIndex.ll
5 4 bench/llvm/optimized/ParsePragma.ll
18 19 bench/llvm/optimized/X86Disassembler.ll
12 13 bench/oiio/optimized/imagebufalgo_pixelmath.ll
2 2 bench/oiio/optimized/imagecache.ll
5 6 bench/openjdk/optimized/macro.ll
38 39 bench/openjdk/optimized/vframeArray.ll
17 18 bench/openmpi/optimized/opal_info_support.ll
4 4 bench/openmpi/optimized/pml_ob1_rdma.ll
23 28 bench/openusd/optimized/dependency.ll
7 7 bench/postgres/optimized/arrayfuncs.ll
15 14 bench/postgres/optimized/pg_receivewal.ll
21 21 bench/postgres/optimized/xloginsert.ll
29 32 bench/protobuf/optimized/text_format_decode_data.ll
3 3 bench/proxygen/optimized/HTTP2Framer.ll
3 3 bench/qemu/optimized/system_memory.ll
15 16 bench/quantlib/optimized/abcdcalibration.ll
8 7 bench/re2/optimized/onepass.ll
12 12 bench/recastnavigation/optimized/CrowdTool.ll
11 11 bench/recastnavigation/optimized/DetourNavMeshQuery.ll
13 12 bench/regex-rs/optimized/11vfjke4utuj478u.ll
34 32 bench/slurm/optimized/gres.ll
3 4 bench/wasmtime-rs/optimized/3gnma2m1zwm5wpa3.ll
7 8 bench/wasmtime-rs/optimized/4aijogcjfl814gfb.ll
8 9 bench/wasmtime-rs/optimized/5lt5r4zkd9qrbog.ll
6 6 bench/z3/optimized/sat_aig_cuts.ll
7 9 bench/z3/optimized/theory_array_base.ll
10 13 bench/zed-rs/optimized/2bjv2ryetyqaw0uwjf53eylb3.ll
38 44 bench/zed-rs/optimized/5kbsfw3jcmbcslmu1o5kx13w3.ll
5 5 bench/zed-rs/optimized/dhxbdv9bz516ezsc4bp1mh72v.ll

[github-actions]

Summary of Major Changes in the LLVM IR Patch

1. Optimization of Bitwise Operations:

   • Several instances show a shift from using trunc and select for bitwise operations to directly using shl (shift left) and zext (zero-extension). For example, in boost/multiprecision, trunc followed by xor and select is replaced with shl and xor. This reduces intermediate instructions and simplifies the logic.
   • Example:

     %694 = xor i1 %693, %666

     becomes:

     %694 = trunc nuw i8 %665 to i1
     %695 = xor i1 %693, %694

2. Removal of Redundant Instructions:

   • In multiple files, redundant instructions like phi nodes and unnecessary icmp or and operations are removed or simplified. For instance, in coreutils-rs/ParsePragma.ll, the phi node for i1 is replaced with an i8 type, reducing complexity.
   • Example:

     %.033.ph = phi i1 [ true, %.preheader ], [ %.134, %178 ]

     becomes:

     %.033.ph = phi i8 [ 1, %.preheader ], [ %.134, %178 ]

3. Improved Type Handling:

   • The patch consistently replaces trunc operations with zext (zero-extension) or sext (sign-extension) where appropriate, ensuring better handling of signed and unsigned types. For example, in jemalloc/sc.ll, trunc is replaced with zext.
   • Example:

     %inc82.i = zext i1 %cmp.i143.i to i32

     becomes:

     %inc82.i = add i32 %npsizes.7176.i, %count.5.i.i.i

4. Streamlined Conditional Branches:

   • Conditional branches are optimized by combining conditions or removing unnecessary comparisons. For example, in openjdk/vframeArray.ll, the br instruction is simplified by merging conditions.
   • Example:

     br i1 %spec.select.i.i.i, label %38, label %._crit_edge.thread

     becomes:

     br i1 %37, label %38, label %._crit_edge.thread

5. Memory Access Optimization:

   • Memory access patterns are improved by reordering getelementptr and load instructions, ensuring better alignment and reducing redundant loads. For instance, in grpc/outlier_detection.ll, the order of getelementptr and load is adjusted to improve clarity and performance.
   • Example:

     %565 = trunc nuw i8 %564 to i1

     becomes:

     %565 = shl nuw nsw i8 %564, 5

High-Level Overview

The patch primarily focuses on optimizing bitwise operations, improving type handling, and streamlining conditional branches. These changes aim to reduce the number of intermediate instructions, enhance readability, and potentially improve runtime performance by simplifying complex constructs. Additionally, memory access patterns are refined to ensure better alignment and reduce redundant operations. Overall, the patch reflects efforts to make the LLVM IR more efficient and concise while preserving correctness.

model: qwen-plus-latest
CompletionUsage(completion_tokens=802, prompt_tokens=67896, total_tokens=68698, completion_tokens_details=None, prompt_tokens_details=None)