pre-commit: PR143471

[dtcxzyw]

Link: llvm/llvm-project#143471
Requested by: @dtcxzyw

[dtcxzyw]

Diff mode

runner: ariselab-64c-docker
baseline: llvm/llvm-project@6881c7d
patch: llvm/llvm-project#143471
sha256: 64259097d0dbf690113befdadc00498a5739a117177249c52315b332186980e8
commit: 601dd54

86 files changed, 660 insertions(+), 671 deletions(-)

Improvements:
  correlated-value-propagation.NumSIToFP 2077 -> 2078 +0.05%
  correlated-value-propagation.NumSMinMax 9248 -> 9252 +0.04%
  correlated-value-propagation.NumSExt 51156 -> 51177 +0.04%
  instsimplify.NumReassoc 838944 -> 838953 +0.00%
  indvars.NumElimExt 310077 -> 310079 +0.00%
  instcombine.NumSunkInst 3554494 -> 3554503 +0.00%
  globalsmodref-aa.NumNoMemFunctions 812613 -> 812614 +0.00%
  globalsmodref-aa.NumReadMemFunctions 1242319 -> 1242320 +0.00%
  gvn.NumGVNSimpl 4740607 -> 4740608 +0.00%
  instcombine.NegatorTotalNegationsAttempted 22049017 -> 22049020 +0.00%
Regressions:
  memory-builtins.ObjectVisitorLoad 2472679 -> 2472599 -0.00%
  correlated-value-propagation.NumAddNSW 280770 -> 280762 -0.00%
  correlated-value-propagation.NumAddNW 521835 -> 521825 -0.00%
  correlated-value-propagation.NumMulNUW 63086 -> 63085 -0.00%
  correlated-value-propagation.NumMulNW 142347 -> 142345 -0.00%
  correlated-value-propagation.NumNSW 654346 -> 654337 -0.00%
  correlated-value-propagation.NumMulNSW 79261 -> 79260 -0.00%
  indvars.NumLFTR 337327 -> 337323 -0.00%
  correlated-value-propagation.NumNW 1075934 -> 1075922 -0.00%
  adce.NumRemoved 102963 -> 102962 -0.00%

1 1 bench/abc/optimized/abcPart.ll
10 8 bench/casadi/optimized/integrator.ll
31 24 bench/chibicc/optimized/codegen.ll
66 71 bench/ffmpeg/optimized/fic.ll
8 8 bench/ffmpeg/optimized/vf_xfade.ll
2 2 bench/graphviz/optimized/sfcvt.ll
3 3 bench/icu/optimized/umutablecptrie.ll
45 45 bench/openblas/optimized/dorcsd2by1.ll
5 5 bench/openblas/optimized/dtgsen.ll
4 3 bench/opencv/optimized/trackerCSRTSegmentation.ll
144 160 bench/openusd/optimized/warped_motion.ll
4 4 bench/protobuf/optimized/generated_message_tctable_lite.ll
6 6 bench/velox/optimized/JsonType.ll

[github-actions]

Here is a high-level summary of the most significant changes in the provided LLVM IR diffs:

1. Addition of NSW (No Signed Wrap) Flags on Add Instructions
   Multiple add instructions across various functions now include the nsw flag, indicating that signed overflow is undefined behavior for those operations. This allows LLVM to perform more aggressive optimizations under the assumption that signed overflow does not occur. Examples include:

   • %spec.store.select.i = add nsw i32 %6, 1
   • %cond = add nuw nsw i32 %35, 1

2. Improvements in Loop Control and Branching Logic
   Several functions show restructuring or simplification of loop control logic, including:

   • Replacing complex conditionals with simpler comparisons.
   • Introduction of .preheader blocks to better structure loop entry conditions.
   • Removal of redundant and conditions in branch logic, e.g., replacing or.cond1646 with direct use of %913.

3. Use of UMin/UMax Intrinsics Instead of SMin/SMax
   In some cases, signed min/max (@llvm.smin.i32, @llvm.smax.i32) calls are replaced with unsigned equivalents (@llvm.umin.i32). This indicates a change in assumptions about operand ranges and may allow for different optimization strategies based on unsigned semantics.

4. Loop Phi Node Adjustments and Splitting
   PHI nodes in loops have been adjusted or split, often introducing new preheaders or updating incoming values to reflect new control flow paths. These changes improve clarity and correctness after restructured branching or loop unrolling.

5. ZExt Replacements for Signless Extensions
   Some sext or generic extensions were replaced with zext nneg, explicitly indicating non-negative values and zero-extension. This provides additional information to the optimizer and can help eliminate unnecessary sign-extend operations.

These changes collectively suggest improvements in code structure, enabling better optimization opportunities through clearer semantics (e.g., nsw, nneg), improved control flow, and more precise type information.

model: qwen-plus-latest
CompletionUsage(completion_tokens=449, prompt_tokens=31171, total_tokens=31620, completion_tokens_details=None, prompt_tokens_details=None)

[dtcxzyw]

Regression

[nikic]

I was going to say that this will be fixed by github.com/llvm/llvm-project/pull/142466, but the predicate is the wrong way around.