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@zyw-bot zyw-bot commented Jun 21, 2025

Link: llvm/llvm-project#145159
Requested by: @nikic

@github-actions github-actions bot mentioned this pull request Jun 21, 2025
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zyw-bot commented Jun 21, 2025

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runner: ariselab-64c-docker
baseline: llvm/llvm-project@056b52d
patch: llvm/llvm-project#145159
sha256: 39dca9a300dad98fc87cf0084b0d60e48257d7ee25e78fc6a202612e48fc0d72
commit: 7b32e72

53 files changed, 37416 insertions(+), 37940 deletions(-)

Improvements:
  simplifycfg.NumBitMaps 2330 -> 2344 +0.60%
  simplifycfg.NumLinearMaps 4148 -> 4156 +0.19%
  simplifycfg.NumLookupTables 22879 -> 22919 +0.17%
  simplifycfg.NumLookupTablesHoles 2562 -> 2563 +0.04%
  globalsmodref-aa.NumNoMemFunctions 812847 -> 812954 +0.01%
  constmerge.NumIdenticalMerged 15668 -> 15670 +0.01%
  globalsmodref-aa.NumReadMemFunctions 1242553 -> 1242660 +0.01%
  sccp.NumDeadBlocks 754993 -> 755031 +0.01%
  instcombine.NumFactor 46385 -> 46386 +0.00%
  sccp.NumInstRemoved 2106454 -> 2106492 +0.00%
Regressions:
  indvars.NumElimIdentity 1889 -> 1887 -0.11%
  correlated-value-propagation.NumSubNUW 39292 -> 39290 -0.01%
  correlated-value-propagation.NumSubNW 122449 -> 122445 -0.00%
  correlated-value-propagation.NumDeadCases 73059 -> 73057 -0.00%
  correlated-value-propagation.NumSubNSW 83634 -> 83632 -0.00%
  correlated-value-propagation.NumShlNSW 126816 -> 126814 -0.00%
  correlated-value-propagation.NumShlNW 289389 -> 289385 -0.00%
  correlated-value-propagation.NumShlNUW 162573 -> 162571 -0.00%
  correlated-value-propagation.NumNNeg 105567 -> 105566 -0.00%
  correlated-value-propagation.NumNW 1076105 -> 1076096 -0.00%

17 12 bench/cpython/optimized/parking_lot.ll
11 7 bench/hermes/optimized/TypedArray.ll
81 86 bench/image-rs/optimized/2s4mh02dvph60euq.ll
16 29 bench/image-rs/optimized/5ez7udly19o3uj1p.ll
10 6 bench/llvm/optimized/CGOpenMPRuntime.ll
10 6 bench/llvm/optimized/CodeGenPrepare.ll
35 30 bench/llvm/optimized/DataExtractor.ll
47 81 bench/llvm/optimized/DeclSpec.ll
21 16 bench/llvm/optimized/DiagnosticBuilderWrappers.ll
23 19 bench/llvm/optimized/IndexingContext.ll
8 9 bench/llvm/optimized/LowLevelTypeUtils.ll
77 73 bench/llvm/optimized/MCAsmStreamer.ll
25 17 bench/llvm/optimized/MCObjectStreamer.ll
15 12 bench/llvm/optimized/RISCVAsmBackend.ll
52 51 bench/llvm/optimized/SveEmitter.ll
9 10 bench/llvm/optimized/TextStub.ll
60 120 bench/llvm/optimized/WinCOFFObjectWriter.ll
61 42 bench/llvm/optimized/X86MCCodeEmitter.ll
12 27 bench/llvm/optimized/X86RegisterBankInfo.ll
19 15 bench/php/optimized/zend_execute.ll
16 85 bench/regex-rs/optimized/154fzydpihuymjog.ll
25 163 bench/regex-rs/optimized/33whcn8n29l9c6ys.ll
59 60 bench/regex-rs/optimized/3bb5ih3626n2er1d.ll
20 85 bench/regex-rs/optimized/43rm3k0zg7aeemwj.ll
39 110 bench/regex-rs/optimized/6f4i3c8223u3bmw.ll
50 49 bench/ripgrep-rs/optimized/3bctup5kmnkujhz5.ll
51 57 bench/typst-rs/optimized/2d3c2n5y91mtl0x0.ll
56 103 bench/wasmtime-rs/optimized/x7ydxa15kh51k9x.ll
34 27 bench/zed-rs/optimized/4sannzew3n6dftw73jbsboi0v.ll
51 57 bench/zed-rs/optimized/7ud3epkhjcjfe38h6hlh4jrau.ll
45 36 bench/zed-rs/optimized/8bnapxt4ilkd5y3egr7fzm1sv.ll
19 14 bench/zed-rs/optimized/8n2fsvz9zbnw9ojg9jkj0503g.ll
16 29 bench/zed-rs/optimized/bpcj0xb6nmpne8ezqc5krm4m9.ll

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Here is a brief summary of the major changes in this patch:

  1. Replace switch on bit values with cttz + switch on bit positions
    In several functions, instead of directly switching on powers of two (e.g., i32 1, i32 2, i32 4, ...), the code now uses llvm.cttz.iN to count trailing zeros and then switches based on the resulting bit position. This transformation simplifies the switch condition by mapping bit tests into more compact integer indices.

  2. Improved memory attribute annotations for intrinsics
    The attributes for llvm.cttz.i8, llvm.cttz.i32, and llvm.cttz.i64 calls have been updated or added consistently across files to include:

    • nocallback
    • nofree
    • nosync
    • nounwind
    • speculatable
    • willreturn
    • memory(none)
      This indicates better modeling of side effects and call behavior for optimization purposes.
  3. Simplified PHI nodes in critical paths
    Several PHI instructions were modified to remove redundant predecessors or simplify merges after control flow changes induced by replacing switch logic with cttz. These changes reduce complexity and potentially improve register allocation and SSA form during optimization.

  4. Added new switch tables for debug formatting
    New global constant arrays like @"switch.table._ZN42_$LT$$RF$T$u20$as$u20$core..fmt..Debug$GT$3fmt17h6d101b02beeb49b3E" and similar are introduced for optimized dispatch in fmt implementations. These tables map results of cttz to appropriate string representations or format labels.

  5. Control flow restructuring and unreachable label cleanup
    Dead code such as unreachable blocks was removed or restructured after switch transformations. Some unreachable labels were replaced with direct branches to target blocks, improving clarity and reducing unnecessary jumps.


This patch primarily replaces bitmask-based switch statements with llvm.cttz followed by switch-on-integers, which can be more efficient and easier for LLVM to optimize. It also improves metadata and intrinsic function attribute consistency, helping enable better code generation and analysis.

model: qwen-plus-latest
CompletionUsage(completion_tokens=488, prompt_tokens=109109, total_tokens=109597, completion_tokens_details=None, prompt_tokens_details=None)

i32 3, label %8
i32 4, label %9
i32 5, label %10
i32 4, label %10
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?

@dtcxzyw dtcxzyw closed this Jun 22, 2025
br i1 %switch.i.i, label %_ZL15getImmFixupKindm.exit.thread, label %14

14: ; preds = %_ZN4llvm5X86II10isImmPCRelEm.exit.i
%15 = and i32 %.0.i10.i, 7
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Regression.

%.promoted.i = load i64, ptr %5, align 8
%6 = add i64 %.promoted.i, %1
%switch.gep = getelementptr inbounds nuw [4 x i64], ptr @switch.table._ZN8zvariant19framing_offset_size17FramingOffsetSize12write_offset17h7af96b41ab784441E, i64 0, i64 %4
%switch.load = load i64, ptr %switch.gep, align 8
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Regression.

@dtcxzyw dtcxzyw deleted the test-run15798910844 branch June 30, 2025 11:31
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