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pre-commit: PR123518 #2512

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56d37df
pre-commit: PR123518
fhahn Jun 27, 2025
9e68f57
pre-commit: Update
github-actions[bot] Jun 27, 2025
0833417
pre-commit: Remap
github-actions[bot] Jun 27, 2025
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11 changes: 5 additions & 6 deletions bench/abc/optimized/abcDetect.ll
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Expand Up @@ -5698,7 +5698,7 @@ Abc_NtkFinSimOneWord.exit: ; preds = %.lr.ph.i238, %.lr.p
243: ; preds = %.lr.ph311, %367
%244 = phi ptr [ %.val230, %.lr.ph311 ], [ %.val230367, %367 ]
%indvars.iv358 = phi i64 [ %242, %.lr.ph311 ], [ %indvars.iv.next359, %367 ]
%245 = phi i32 [ %233, %.lr.ph311 ], [ %372, %367 ]
%245 = phi i32 [ %233, %.lr.ph311 ], [ %.reass, %367 ]
%.0309 = phi ptr [ null, %.lr.ph311 ], [ %.1, %367 ]
%.0165308 = phi i32 [ %232, %.lr.ph311 ], [ %.1166, %367 ]
%.0167307 = phi ptr [ %230, %.lr.ph311 ], [ %.1168, %367 ]
Expand Down Expand Up @@ -5954,13 +5954,12 @@ Vec_IntPushTwo.exit: ; preds = %Vec_IntPush.exit.i,
%.1166 = phi i32 [ %280, %.loopexit ], [ %.0165308, %Vec_IntPushTwo.exit ]
%.1 = phi ptr [ %.0309, %.loopexit ], [ %320, %Vec_IntPushTwo.exit ]
%indvars.iv.next359 = add nsw i64 %indvars.iv358, 2
%368 = or disjoint i64 %indvars.iv.next359, 1
%368 = trunc nsw i64 %indvars.iv358 to i32
%.reass = add i32 %368, 3
%369 = getelementptr i8, ptr %.1168, i64 4
%.0167.val218 = load i32, ptr %369, align 4, !tbaa !37
%370 = sext i32 %.0167.val218 to i64
%371 = icmp slt i64 %368, %370
%372 = trunc nsw i64 %368 to i32
br i1 %371, label %243, label %.critedge14.loopexit, !llvm.loop !155
%370 = icmp slt i32 %.reass, %.0167.val218
br i1 %370, label %243, label %.critedge14.loopexit, !llvm.loop !155

.critedge14.loopexit: ; preds = %367
%.val228.pre = load i32, ptr %14, align 4, !tbaa !87
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27 changes: 13 additions & 14 deletions bench/abc/optimized/fraigVec.ll
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Expand Up @@ -633,30 +633,29 @@ define void @Fraig_NodeVecRemove(ptr noundef captures(none) %0, ptr noundef read

._crit_edge: ; preds = %12, %._crit_edge.loopexit.split.loop.exit, %2
%.0.lcssa = phi i32 [ 0, %2 ], [ %13, %._crit_edge.loopexit.split.loop.exit ], [ %4, %12 ]
%.121 = add nuw nsw i32 %.0.lcssa, 1
%.121 = add nsw i32 %.0.lcssa, 1
%14 = icmp slt i32 %.121, %4
br i1 %14, label %.lr.ph25, label %._crit_edge26

.lr.ph25: ; preds = %._crit_edge
%15 = getelementptr inbounds nuw i8, ptr %0, i64 8
%16 = load ptr, ptr %15, align 8, !tbaa !11
%17 = zext i32 %.0.lcssa to i64
%18 = add nuw nsw i64 %17, 1
%17 = sext i32 %.0.lcssa to i64
%18 = add nsw i64 %17, 1
br label %19

19: ; preds = %.lr.ph25, %19
%indvars.iv28 = phi i64 [ %18, %.lr.ph25 ], [ %indvars.iv.next29, %19 ]
%.1.in22 = phi i32 [ %.0.lcssa, %.lr.ph25 ], [ %26, %19 ]
%20 = getelementptr inbounds nuw ptr, ptr %16, i64 %indvars.iv28
%indvars.iv28 = phi i64 [ %17, %.lr.ph25 ], [ %indvars.iv.next29, %19 ]
%.1.in22 = phi i64 [ %18, %.lr.ph25 ], [ %indvars.iv.next30, %19 ]
%20 = getelementptr inbounds ptr, ptr %16, i64 %indvars.iv29
%21 = load ptr, ptr %20, align 8, !tbaa !12
%22 = zext nneg i32 %.1.in22 to i64
%23 = getelementptr inbounds nuw ptr, ptr %16, i64 %22
store ptr %21, ptr %23, align 8, !tbaa !12
%indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
%24 = trunc nuw i64 %indvars.iv.next29 to i32
%25 = icmp sgt i32 %4, %24
%26 = trunc nuw i64 %indvars.iv28 to i32
br i1 %25, label %19, label %._crit_edge26, !llvm.loop !25
%22 = getelementptr inbounds ptr, ptr %16, i64 %indvars.iv31
store ptr %21, ptr %22, align 8, !tbaa !12
%indvars.iv.next30 = add nsw i64 %.1.in22, 1
%indvars.iv.next29 = add nsw i64 %indvars.iv28, 1
%24 = trunc i64 %indvars.iv.next30 to i32
%25 = icmp eq i32 %4, %24
br i1 %25, label %._crit_edge26, label %19, !llvm.loop !25

._crit_edge26: ; preds = %19, %._crit_edge
%27 = add nsw i32 %4, -1
Expand Down
30 changes: 17 additions & 13 deletions bench/abc/optimized/giaIso.ll
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Expand Up @@ -2743,37 +2743,41 @@ define void @Gia_IsoAssignOneClass2(ptr noundef captures(none) %0) local_unnamed
.lr.ph89: ; preds = %67
%71 = getelementptr inbounds nuw i8, ptr %3, i64 8
%72 = load ptr, ptr %71, align 8, !tbaa !39
%73 = zext i32 %.04672 to i64
%73 = sext i32 %.04672 to i64
br label %74

74: ; preds = %.lr.ph89, %74
%indvars.iv99 = phi i64 [ %73, %.lr.ph89 ], [ %indvars.iv.next100, %74 ]
%indvars.iv.next100 = add nuw nsw i64 %indvars.iv99, 2
%75 = getelementptr inbounds nuw i32, ptr %72, i64 %indvars.iv.next100
%indvars.iv.next100 = add nsw i64 %indvars.iv99, 2
%75 = getelementptr inbounds i32, ptr %72, i64 %indvars.iv.next100
%76 = load i32, ptr %75, align 4, !tbaa !43
%77 = getelementptr inbounds nuw i32, ptr %72, i64 %indvars.iv99
%77 = getelementptr inbounds i32, ptr %72, i64 %indvars.iv99
store i32 %76, ptr %77, align 4, !tbaa !43
%78 = getelementptr inbounds nuw i8, ptr %77, i64 12
%78 = getelementptr i8, ptr %77, i64 12
%79 = load i32, ptr %78, align 4, !tbaa !43
%80 = getelementptr inbounds nuw i8, ptr %77, i64 4
%80 = getelementptr i8, ptr %77, i64 4
store i32 %79, ptr %80, align 4, !tbaa !43
%.val51 = load i32, ptr %4, align 4, !tbaa !37
%81 = add nsw i32 %.val51, -2
%82 = trunc nuw i64 %indvars.iv.next100 to i32
%83 = icmp sgt i32 %81, %82
%82 = sext i32 %81 to i64
%83 = icmp slt i64 %indvars.iv.next100, %82
br i1 %83, label %74, label %._crit_edge, !llvm.loop !91

._crit_edge: ; preds = %74, %67
%.147.lcssa = phi i32 [ %.04672, %67 ], [ %82, %74 ]
%.lcssa = phi i32 [ %69, %67 ], [ %81, %74 ]
._crit_edge: ; preds = %74
%84 = trunc nsw i64 %indvars.iv.next100 to i32
br label %._crit_edge

._crit_edge: ; preds = %._crit_edge.loopexit, %67
%.147.lcssa = phi i32 [ %.04672, %67 ], [ %84, %._crit_edge.loopexit ]
%.lcssa = phi i32 [ %69, %67 ], [ %81, %._crit_edge.loopexit ]
store i32 %.lcssa, ptr %4, align 4, !tbaa !37
%84 = lshr exact i32 %.147.lcssa, 1
%85 = sdiv i32 %.147.lcssa, 2
%85 = getelementptr inbounds nuw i8, ptr %0, i64 24
%86 = load ptr, ptr %85, align 8, !tbaa !34
%87 = lshr i64 %68, 32
%88 = getelementptr inbounds nuw i32, ptr %86, i64 %87
%89 = load i32, ptr %88, align 4, !tbaa !43
%90 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, i32 noundef %84, i32 noundef %.163, i32 noundef %89)
%90 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, i32 noundef %85, i32 noundef %.163, i32 noundef %89)
ret void
}

Expand Down
38 changes: 17 additions & 21 deletions bench/abc/optimized/sclLoad.ll
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Expand Up @@ -104,26 +104,22 @@ Vec_FltStart.exit: ; preds = %6, %2
%42 = sitofp i32 %41 to float
%43 = fdiv float %39, %42
%.06187 = add nuw nsw i32 %.06293, 1
%44 = zext i32 %.06187 to i64
%45 = icmp samesign ugt i64 %indvars.iv113, %44
%44 = sext i32 %.06187 to i64
%45 = icmp sgt i64 %indvars.iv113, %44
br i1 %45, label %.lr.ph89.preheader, label %.loopexit81

.lr.ph89.preheader: ; preds = %38
%46 = zext i32 %.06293 to i64
%47 = add nuw nsw i64 %46, 1
br label %.lr.ph89

.lr.ph89: ; preds = %.lr.ph89.preheader, %.lr.ph89
%indvars.iv108 = phi i64 [ %47, %.lr.ph89.preheader ], [ %indvars.iv.next109, %.lr.ph89 ]
%48 = trunc i64 %indvars.iv108 to i32
%49 = sub i32 %48, %.06293
%50 = sitofp i32 %49 to float
%51 = tail call float @llvm.fmuladd.f32(float %43, float %50, float %.06791)
%52 = getelementptr inbounds nuw float, ptr %15, i64 %indvars.iv108
store float %51, ptr %52, align 4, !tbaa !23
%indvars.iv.next109 = add nuw nsw i64 %indvars.iv108, 1
%exitcond112.not = icmp eq i64 %indvars.iv.next109, %indvars.iv113
br i1 %exitcond112.not, label %.loopexit81, label %.lr.ph89, !llvm.loop !25
.lr.ph89.preheader: ; preds = %38, %.lr.ph89
%indvars.iv108 = phi i64 [ %indvars.iv.next109, %.lr.ph89 ], [ %44, %38 ]
%46 = trunc i64 %indvars.iv108 to i32
%47 = sub i32 %46, %.06293
%48 = sitofp i32 %47 to float
%49 = tail call float @llvm.fmuladd.f32(float %43, float %48, float %.06791)
%50 = getelementptr inbounds float, ptr %15, i64 %indvars.iv108
store float %49, ptr %50, align 4, !tbaa !23
%indvars.iv.next109 = add nsw i64 %indvars.iv108, 1
%51 = and i64 %indvars.iv.next109, 4294967295
%exitcond111.not = icmp eq i64 %51, %indvars.iv112
br i1 %exitcond111.not, label %.loopexit81, label %.lr.ph89, !llvm.loop !25

.loopexit81: ; preds = %.lr.ph89, %38, %.lr.ph94
%.168 = phi float [ %.06791, %.lr.ph94 ], [ %36, %38 ], [ %36, %.lr.ph89 ]
Expand All @@ -141,12 +137,12 @@ Vec_FltStart.exit: ; preds = %6, %2
%55 = getelementptr inbounds nuw i8, ptr %0, i64 12
%56 = load float, ptr %55, align 4, !tbaa !27
%57 = fmul float %54, %56
%.198 = add nuw nsw i32 %.062.lcssa, 1
%58 = icmp samesign ult i32 %.198, %.2.lcssa
%.198 = add nsw i32 %.062.lcssa, 1
%58 = icmp slt i32 %.198, %.2.lcssa
br i1 %58, label %.lr.ph100.preheader, label %.loopexit

.lr.ph100.preheader: ; preds = %.critedge4
%59 = zext i32 %.062.lcssa to i64
%59 = zext nneg i32 %.062.lcssa to i64
%60 = add nuw nsw i64 %59, 1
%wide.trip.count121 = zext i32 %.2.lcssa to i64
br label %.lr.ph100
Expand Down
20 changes: 11 additions & 9 deletions bench/abc/optimized/utilBSet.ll
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Expand Up @@ -2413,9 +2413,10 @@ define void @Abc_TtPermGenTest() local_unnamed_addr #7 {
br label %13

13: ; preds = %23, %12
%indvars.iv28.i = phi i64 [ 4, %12 ], [ %indvars.iv.next29.i, %23 ]
%indvars.iv23.i = phi i64 [ 5, %12 ], [ %indvars.iv.next24.i, %23 ]
%.05.i = phi i32 [ 4, %12 ], [ %24, %23 ]
%14 = zext nneg i32 %.05.i to i64
%indvars41 = trunc i64 %indvars.iv28.i to i32
%14 = and i64 %indvars.iv28.i, 4294967295
%15 = getelementptr i32, ptr %1, i64 %14
%16 = getelementptr i8, ptr %15, i64 -4
%17 = load i32, ptr %16, align 4, !tbaa !7
Expand All @@ -2425,7 +2426,7 @@ define void @Abc_TtPermGenTest() local_unnamed_addr #7 {

.critedge.preheader.i: ; preds = %13
%19 = getelementptr i8, ptr %15, i64 -4
%20 = icmp slt i32 %.05.i, 5
%20 = icmp slt i32 %indvars41, 5
br i1 %20, label %.lr.ph.preheader.i, label %.critedge2.thread.i

.critedge2.thread.i: ; preds = %.critedge.preheader.i
Expand All @@ -2435,12 +2436,13 @@ define void @Abc_TtPermGenTest() local_unnamed_addr #7 {
br label %Abc_TtPermGen.exit

.lr.ph.preheader.i: ; preds = %.critedge.preheader.i
%22 = sext i32 %.05.i to i64
%sext = shl i64 %indvars.iv28.i, 32
%22 = ashr exact i64 %sext, 32
br label %.lr.ph.i

23: ; preds = %13
%24 = add nsw i32 %.05.i, -1
%.not39.i = icmp eq i32 %.05.i, 0
%24 = add nsw i64 %indvars.iv28.i, -1
%.not39.i = icmp eq i32 %indvars41, 0
%indvars.iv.next24.i = add nsw i64 %indvars.iv23.i, -1
br i1 %.not39.i, label %Abc_TtPermGen.exit, label %13, !llvm.loop !60

Expand All @@ -2467,14 +2469,14 @@ define void @Abc_TtPermGenTest() local_unnamed_addr #7 {
%27 = load i32, ptr %gep, align 4, !tbaa !7
store i32 %27, ptr %19, align 4, !tbaa !7
store i32 %17, ptr %gep, align 4, !tbaa !7
%.not52.i = icmp eq i32 %.05.i, 4
%.not52.i = icmp eq i32 %indvars41, 4
br i1 %.not52.i, label %Abc_TtPermGen.exit, label %.lr.ph14.i

.lr.ph14.i: ; preds = %.critedge2.i, %.lr.ph14.i
%indvars.iv32.i = phi i64 [ %indvars.iv.next33.i, %.lr.ph14.i ], [ 5, %.critedge2.i ]
%indvars.iv30.i = phi i64 [ %indvars.iv.next31.i, %.lr.ph14.i ], [ %14, %.critedge2.i ]
%indvars.iv30.i = phi i64 [ %indvars.iv.next31.i, %.lr.ph14.i ], [ %indvars.iv28.i, %.critedge2.i ]
%indvars.iv26.i = phi i64 [ %indvars.iv.next27.i, %.lr.ph14.i ], [ %indvars.iv23.i, %.critedge2.i ]
%28 = getelementptr inbounds nuw i32, ptr %1, i64 %indvars.iv30.i
%28 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv30.i
%29 = load i32, ptr %28, align 4, !tbaa !7
%gep9.i = getelementptr i32, ptr %invariant.gep, i64 %indvars.iv32.i
%30 = load i32, ptr %gep9.i, align 4, !tbaa !7
Expand Down
7 changes: 4 additions & 3 deletions bench/abc/optimized/verCore.ll
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Expand Up @@ -2580,7 +2580,8 @@ Vec_PtrFree.exit378.i: ; preds = %127, %.critedge6.i
%.val366500.pre.i = load ptr, ptr %37, align 8, !tbaa !62
%.phi.trans.insert600.i = getelementptr i8, ptr %.val366500.pre.i, i64 4
%.val366.val501.pre.i = load i32, ptr %.phi.trans.insert600.i, align 4, !tbaa !20
%147 = and i64 %indvars.iv.next581.i, 4294967295
%sext604.i = shl i64 %indvars.iv.next581.i, 32
%147 = ashr exact i64 %sext604.i, 32
br label %.critedge8.preheader.i

.critedge8.preheader.i: ; preds = %.critedge8.preheader.loopexit.i, %.critedge10.preheader.i
Expand Down Expand Up @@ -2645,9 +2646,9 @@ Vec_PtrFree.exit378.i: ; preds = %127, %.critedge6.i
%.val366602.i = phi ptr [ %.val366.i, %.critedge8.loopexit.i ], [ %.val366500.i, %.critedge8.preheader.i ]
%indvars.iv586.i = phi i64 [ %indvars.iv.next587.i, %.critedge8.loopexit.i ], [ %.1273.lcssa.i, %.critedge8.preheader.i ]
%.2282502.i = phi i32 [ %.3283.lcssa.i, %.critedge8.loopexit.i ], [ 0, %.critedge8.preheader.i ]
%indvars.iv.next587.i = add nuw nsw i64 %indvars.iv586.i, 1
%indvars.iv.next587.i = add nsw i64 %indvars.iv586.i, 1
%.val345.i = load ptr, ptr %41, align 8, !tbaa !23
%166 = getelementptr inbounds nuw ptr, ptr %.val345.i, i64 %indvars.iv586.i
%166 = getelementptr inbounds ptr, ptr %.val345.i, i64 %indvars.iv586.i
%167 = load ptr, ptr %166, align 8, !tbaa !63
%168 = getelementptr inbounds nuw i8, ptr %167, i64 8
%169 = load ptr, ptr %168, align 8, !tbaa !77
Expand Down
2 changes: 1 addition & 1 deletion bench/abseil-cpp/optimized/cord_test.ll
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Expand Up @@ -193121,7 +193121,7 @@ _ZN4absl4CordD2Ev.exit442: ; preds = %813, %816
820: ; preds = %.preheader496, %_ZN4absl4CordD2Ev.exit444
%821 = phi ptr [ %822, %_ZN4absl4CordD2Ev.exit444 ], [ %141, %.preheader496 ]
%822 = getelementptr inbounds i8, ptr %821, i64 -16
%823 = load i8, ptr %822, align 1, !tbaa !24
%823 = load i8, ptr %822, align 16, !tbaa !24
%824 = and i8 %823, 1
%.not.i443 = icmp eq i8 %824, 0
br i1 %.not.i443, label %_ZN4absl4CordD2Ev.exit444, label %825
Expand Down
4 changes: 2 additions & 2 deletions bench/actix-rs/optimized/2nm6r5hc2u1hk1e1.ll
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Expand Up @@ -2448,10 +2448,10 @@ default.unreachable: ; preds = %14
18: ; preds = %14
%19 = getelementptr inbounds nuw i8, ptr %.sroa.013.032, i64 1
%20 = getelementptr inbounds nuw i8, ptr %.sroa.013.032, i64 16
%21 = load i8, ptr %20, align 1, !alias.scope !527, !noalias !531, !noundef !34
%21 = load i8, ptr %20, align 8, !alias.scope !527, !noalias !531, !noundef !34
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(7) %.sroa.14.i, ptr noundef nonnull readonly align 1 dereferenceable(7) %19, i64 7, i1 false), !alias.scope !533, !noalias !534
%.sroa.15.1..sroa_idx.i = getelementptr inbounds nuw i8, ptr %.sroa.013.032, i64 8
%.sroa.15.1.copyload.i = load ptr, ptr %.sroa.15.1..sroa_idx.i, align 1, !alias.scope !535, !noalias !534
%.sroa.15.1.copyload.i = load ptr, ptr %.sroa.15.1..sroa_idx.i, align 8, !alias.scope !535, !noalias !534
%.sroa.16.16.insert.ext.i = zext i8 %21 to i64
br label %28

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