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Getting Started
There are two main chapters in this page. Tutorials and Demo Projects. First go through the tutorials that will show the very basics regarding on how to develop work with the given tools on the M2S010-MKR-KIT Development Board.
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1. Create Project
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1.1) Open Libero and start a new project: "Project->New Project"

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1.2) Under Project Details set "Project name and location" and preferred HDL type (VHDL)

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1.3.) In Device Selection choose M2S010-TQ144

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1.4.) Press the “Finish” button to start the project.
All further project configuration (Device Setting, Design Template, Add HDL Sources and Add Constraints) remains unchanged. In case a window pops up select “Enhanced Constraint Flow”.
2. Create (Smart)Design
- 2.1) In the "Design Flow" panel, double-click "Create SmartDesign" and choose a name.

Creating an HDL design in Libero can either be done by writing HDL code (Verilog or VHDL) or by using the SmartDesign. In SmartDesign either integrated or custom functional blocks can be connected to create an HDL description, the functional blocks can be either SmartDesign blocks containing functional blocks themselves or HDL code describing hardware implementation of a certain function. HDL code will be generated from the SmartDesign before synthesis or simulation. SmartDesign is useful for top-Level design, as it is easier to read and change than normal HDL code.
- 2.2) In the "Catalog" panel, you may find integrated libero building blocks to aid your design.
Drag the following blocks into your design:

Here, one may find all available building blocks, from AND gates to soft-core microprocessors, all listed in their respective category. The search bar is an important feature to find the required block.
Use drag and drop capability to move the desired block to the main SmartDesign window. Start
by adding “Chip Oscillators”, “Clock Conditioning Circuitry”, “SYSRESET” and “AND2” block.

Double click OSC_0 (Chip Oscillator) and select only the 2nd configuration “On-Chip 25/50MHz
RC Oscillator” and choose “Drives Fabric CCC(s)”. This is done to use the integrated RC
Oscillator for our desired higher frequency PLL clock signal.

Double click FCCC_0 and on the ‘Basic’ panel change “Dedicated Input Pad 0” to “25/50 MHz
Oscillator” and accept the changes. In the Clock Conditioning Circuit up to 4 different output
frequencies can be used, they can have a maximum frequency up to 400MHz.

3. Add your own VHDL Component
- 3.1) Go to File -> New -> HDL to create an HDL file, select VHDL as the HDL type and choose an appropriate name for its function as it is passed to the entity name.

Write VHDL code to implement an 8-bit array varying binary number to control the evaluation board LEDs labeled with an LEDs[7:0] port. In the left panel, select Design Hierarchy, click on your .vhd file and drag and drop the block into the SmartDesign main window. In this example a simple 32-bit clock counter was implemented which will use the LEDs to display bit 32 to 25.
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity Blinking_LEDs is
port (
CLK,Reset : IN std_logic;
LEDs : OUT std_logic_vector(7 downto 0)
);
end Blinking_LEDs;
architecture behavorial of Blinking_LEDs is
signal clk_counter : std_logic_vector(31 downto 0) := (others => '0'); -- counter
begin
counter_clk: process(CLK,Reset)
begin
if (Reset = '0' and rising_edge(CLK)) then -- synchronous counter VHDL
clk_counter <= (others => '0');
elsif rising_edge(CLK) then
clk_counter <= clk_counter + 1;
end if;
end process;
LEDs <= not( clk_counter(31 downto 24));
end behavorial;- 3.2) Click on Generate Component and then on the project's tab click on Build Hierarchy.

4. Arrange the design.

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4.1.) Use Connection Mode to connect all pins of the design or select two pins while holding down shift, then right click on a pin and select “Connect”. Right click on output pin array LEDs [7:0] in the Blinking_LEDs_0 module and select “Promote to Top Level” to obtain the external LED array. Use ‘AND2_0’ to connect ‘POWER_ON_RESET_N’ and ‘LOCK’ pin, this will be used as the ‘Reset’ signal of the circuit. ‘Reset’ is Low when either the device is powered on or when the phase of the clock of the PLL is unstable.
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4.2.) If not already set, right click on “main” in the Design Hierarchy panel and choose “Set As Root”. Bold letters show the current root design.

- 4.3.) Click on Generate Component to generate .vhd code of the selected root design then Build Hierarchy once more.
5. Simulate Design through a Testbench
Simulations in Libero are executed in ModelSim and can be either implemented by the user as a classical VHDL testbench or by using the SmartDesign Testbench. Simulations can be performed 3 times during the design phase of a project, Pre-Synthesis Simulation, Post-Synthesis-Simulation and Post Layout Simulation (e.g. to detect latches). This section will cover simulation via the SmartDesign Testbench.
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5.1) To perform a simulation of the project or sub elements (VHDL code blocks) of the project via Libero, configure either the blocks or main function as the root and press “Generate Component” (as described in the previous section).
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5.2) Go to Project -> Project Settings -> Simulation to change simulation parameters. Two important configuration parameters are under “DO File” (Simulation runtime) and “Vsim commands” (Resolution, which is helpful in reducing the compute time for longer simulations).

- 5.3) Create testbench under File -> New -> SmartDesign Testbench. It automatically uses your root selection as the design under test.

- 5.4) Consider using Simulation Cores from the Catalog for generating stimulus signals.
- Reset_Generator
- Promote to Top-Level: LEDs

- 5.5) Generate Component and run Simulation by double clicking on Simulate in “Design Flow” Panel to start ModelSim.

- 5.6) Drag and drop additional signals in ModelSim to check their timing behavior. Restart simulation to display newly added signals.

6. Build Project and Program Board/Hardware
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6.1) After successful generation and simulation (not mandatory) of the design, press Synthesize in the Design Flow Panel. After each step check reports (e.g. Resource Usage under Synthesize)
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6.2) Now Constraints can be specified. Go to Design Flow -> Manage constraints to call the “Constraint Manager”.
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6.3) Select the panel for I/O Attributes and go to Edit -> Edit with I/O Editor.

- 6.4) In the Editor all ports defined in the design are displayed, leave I/O Standard as default and select pin Number to the corresponding pin of the package. Check board schematics.

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6.5) Timing Constraints are important but not necessary for smaller, not time critical designs. Timing Constraints can be set for “Synthesis”, “Place and Route” and “Timing Verification”.
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6.6) Floor Planner and Netlist Attributes constraints will not be used and set in this course. For more advanced projects it might become very useful. For detailed design constraints information refer to: Design and Constraints for Libero SoC v11.8.
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6.7) After setting the constraints click on “Place and Route” in the Design Flow window to place and interconnect logic elements in the grid of the FPGA. If necessary, perform a Post Layout Simulation.
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6.8) Click on “Generate FPGA Array data” in the Design Flow window to create database files used in downstream tools (SmartDebug or Programming).
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6.9) Press “Generate Bitstream” in the Design Flow Panel to create a bitstream for programming.
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6.10) “Run PROGRAM Action” in the Design Flow Panel to start the Programming Routine (Device must be connected). Now the Device is programmed and ready to use.

1. Create and Configure Project
Similar to the previous section a new FPGA project needs to be created in Libero and uploaded to the SmartFusion2 to program the programmable logic. Due to the previously detailed description of steps, a short summary is given for Libero. For applications using the integrated processor, it is recommended to use the system builder function from Libero.
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1.1) Create new Project and Start System Builder in the Designflow Panel

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1.2) In Device Feature, memory and microcontroller options can be activated. Use default settings in Device Features and press ‘Next’
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1.3) In Peripherals all Peripherals of the System can be configured. Deactivate all MSS Peripherals and activate MSS_GPIO.

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1.4) Press the wrench icon next to MSS_GPIO to configure GPIOs. Here the direction of the GPIO and connectivity as well as the set/reset definition can be controlled. For our application change GPIO_0 – 7 to Output and Connectivity to FABRIC_A.

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1.5) In Clocks all clock related settings can be configured, from System Clock to CCC. In this example change the System Clock to On-chip 25/50 MHz RC Oscillator.

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1.6) Settings for Microcontroller, SECDED, Security, Interrupts and Memory Map will be unchanged for now. The purpose of each panel is self-explanatory and will not be discussed in detail.
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1.7) The block created by the System builder should open a new SmartDesign tab. If this is not the case, then create a SmartDesign and Drag-and-Drop the System Builder Core from the Design Hierarchy Panel. Connect the Core according to Figure 30, mark the MSS_READY and FAB_CCC_PINS as unused and promote the GPIO_FABRIC to top level.

2. Program Device
- 2.1) Simply follow the steps from the previous tutorial to build/flash the device.
3. Export Firmware
- 3.1) Firmware for the MSS can be configured and exported to SoftConsole now. If the Firmware was
not yet installed, it is necessary to download it. Click on the download Symbol to download all
Firmware Cores in Configure Firmware Cores. Export the Firmware Cores as a firmware folder in
the Libero project. Set the location for SoftConsole Project and Software IDE (standard: a new
folder “firmware” within the project folder will be generated)
4. Configure Libero's SoftConsole
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4.1) Open SoftConsole and select Workspace, either use a common SoftConsole workspace or create an own workspace for each Libero Project (like in this case).


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4.2) Go to File -> New -> C Project to create a new Project for coding in C.

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4.3) Choose Project name, select Empty Project, ARM Cross GCC and press Next. On the following 2 pages use default settings.

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4.4) Right click on Project Name in Project Explorer and select Import choose General -> File system and open the directory of the previously created Firmware.

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4.5) Select everything to import all firmware and press Finish.

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4.6) Click on File -> New -> Source File and select a name (e.g. main.c) for your C code.
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4.7) Write a short Code in C to interact with LEDs of the Maker board.
/*
* main.c
* Clock Counting example code.
* Created on: Aug 30, 2018
* Author: Christopher Mandla
*/
#include "drivers/mss_gpio/mss_gpio.h" //GPIO functions
#include "CMSIS/system_m2sxxx.h" //Startup configuration + SystemCoreClock etc.
/*==============================================================================
Private functions.
*/
static void delay(void);
/*==============================================================================
* main() function.
*/
int main()
{
/* Initialize SmartFusion MSS GPIOs.
* Read mss_gpio.h for a thorough explanation.*/
MSS_GPIO_init();
/* Configure MSS GPIOs.*/
MSS_GPIO_config( MSS_GPIO_0 , MSS_GPIO_OUTPUT_MODE );
MSS_GPIO_config( MSS_GPIO_1 , MSS_GPIO_OUTPUT_MODE );
MSS_GPIO_config( MSS_GPIO_2 , MSS_GPIO_OUTPUT_MODE );
MSS_GPIO_config( MSS_GPIO_3 , MSS_GPIO_OUTPUT_MODE );
MSS_GPIO_config( MSS_GPIO_4 , MSS_GPIO_OUTPUT_MODE );
MSS_GPIO_config( MSS_GPIO_5 , MSS_GPIO_OUTPUT_MODE );
MSS_GPIO_config( MSS_GPIO_6 , MSS_GPIO_OUTPUT_MODE );
MSS_GPIO_config( MSS_GPIO_7 , MSS_GPIO_OUTPUT_MODE );
/* Infinite loop. */
for(;;)
{
uint32_t gpio_pattern;
/* Decrement delay counter.*/
delay();
/* Count pattern bits with ones. */
// Invert number to get normal bit count with ~
gpio_pattern = (~MSS_GPIO_get_outputs());
gpio_pattern = gpio_pattern + 0x00000001;
if(gpio_pattern == 0x00000100){
// If GPIO count is maximum 256-1 ->set to 0
gpio_pattern = 0x00000000;
}
// Invert number again to properly display output (0 -> LED on)
MSS_GPIO_set_outputs( ~gpio_pattern );
}
return 0;
MSS_GPIO_set_outputs( 0x00000000 );
}
/*==============================================================================
Delay
*/
static void delay(void)
{
volatile uint32_t delay_count = SystemCoreClock / 32u;
while(delay_count > 0u)
{
--delay_count;
}
}-
4.8) Right-click on Project and select Properties. Go to C/C++ Build -> Settings –> GNU ARM Cross C Linker / Miscellaneous and activate ‘Use newlib-nano (--specs=nano.specs)'.

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4.9) Still in settings go to -> GNU ARM Cross C Compiler / Miscellaneous and in the ‘Other compiler flags’ textbox “--specs=cmsis.specs” (if forgotten typical error: “core_cm3.h no such file”)

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4.10) In Properties under C/C++ Build -> Settings -> GNU ARM Cross C Linker / General add Script Files and select in your workspace CMSIS -> startup_gcc/debug-in-microsemi-smartfusion2-esram.ld.

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4.11) Go to Project -> Build all to create executable for debugging.

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4.12) Go to Debug (Bug-symbol) -> Debug Configurations...

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4.13) Create Launch new Configuration and go to the Debugger panel and write in ‘Config options’: ‘--command "set DEVICE M2S010" --file board/microsemi-cortex-m3.cfg‘ (without ‘).
For other devices please specify Device name.

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4.14) In the Startup Panel deactivate ‘Pre-run/Restart reset’ and start Debugging by pressing ‘Debug’.

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4.15) Confirm Perspective Switch to change perspective for debugging.

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4.16) Resume debugging , if it is suspended by a Breakpoint. Now the LEDs on the evaluation board should blink.
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4.17) Change to the C/C++ Perspective on the top right corner of SoftConsole.

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4.18) Change Build Configuration to Release in:
- Project -> Build Configuration -> Set Active -> 2. Release
- Project -> Build Configuration -> Set Active -> 2. Release
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4.19) Repeat Step 8. + 9.
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4.20) Similar to Step 10. in properties under C/C++ Build -> Settings -> GNU ARM Cross C Linker / General add Script Files and select in your workspace CMSIS -> startup_gcc/production- smartfusion2-execute-in-place.ld.
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4.21) Build Project like in Step 11. to create files to program ARM Cortex-M3 of device.
5. Program ARM Cortex-M3
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5.1) Reopen SoC FPGA Project in Libero.
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5.2) Double Click on System Builder Block to open Configuration.
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5.3) Enable in Device Features ‘MSS On-chip Flash Memory’. New Panel ‘Memories’ is now accessible.

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5.4) In the ‘Memories’ Panel select Data storage and press the ‘Add to System’ Button to select the ARM Cortex M3 Program content to be uploaded to device.

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5.5) Choose generated Content from SoftConsole Project (.hex file) and name Client.

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5.6) Don’t change any settings and close ‘System Builder Configuration’.
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5.7) Repeat all steps necessary to program device from ‘Generate Component’ to ‘Generate Bitstream’ and ‘Run PROGRAM Action’.
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5.8) C code is now running from the eNVM of the ARM Cortex M3.
- TODO
- TODO
- TODO
- TODO
Authors: Daniel Duclos-Cavalcanti, Ala Fnayou