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Scott Larson
committed
apply 6.0.2 patch
1 parent 6a018a4 commit 40a402b

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‎common/inc/tx_api.h‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626
/* APPLICATION INTERFACE DEFINITION RELEASE */
2727
/* */
2828
/* tx_api.h PORTABLE C */
29-
/* 6.0.1 */
29+
/* 6.0.2 */
3030
/* AUTHOR */
3131
/* */
3232
/* William E. Lamie, Microsoft Corporation */
@@ -47,6 +47,9 @@
4747
/* 06-30-2020 William E. Lamie Modified comment(s), and */
4848
/* updated product constants, */
4949
/* resulting in version 6.0.1 */
50+
/* 08-14-2020 Scott Larson Modified comment(s), and */
51+
/* updated product constants, */
52+
/* resulting in version 6.0.2 */
5053
/* */
5154
/**************************************************************************/
5255

@@ -79,7 +82,7 @@ extern "C" {
7982
#define AZURE_RTOS_THREADX
8083
#define THREADX_MAJOR_VERSION 6
8184
#define THREADX_MINOR_VERSION 0
82-
#define THREADX_PATCH_VERSION 1
85+
#define THREADX_PATCH_VERSION 2
8386

8487
/* Define the following symbol for backward compatibility */
8588
#define EL_PRODUCT_THREADX

‎common_smp/inc/tx_api.h‎

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626
/* APPLICATION INTERFACE DEFINITION RELEASE */
2727
/* */
2828
/* tx_api.h PORTABLE SMP */
29-
/* 6.0.1 */
29+
/* 6.0.2 */
3030
/* AUTHOR */
3131
/* */
3232
/* William E. Lamie, Microsoft Corporation */
@@ -44,6 +44,9 @@
4444
/* DATE NAME DESCRIPTION */
4545
/* */
4646
/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
47+
/* 08-14-2020 William E. Lamie Modified comment(s), and */
48+
/* updated product constants, */
49+
/* resulting in version 6.0.2 */
4750
/* */
4851
/**************************************************************************/
4952

@@ -80,9 +83,13 @@ extern "C" {
8083
/* Define the major/minor version information that can be used by the application
8184
and the ThreadX source as well. */
8285

86+
#define AZURE_RTOS_THREADX
87+
#define THREADX_MAJOR_VERSION 6
88+
#define THREADX_MINOR_VERSION 0
89+
#define THREADX_PATCH_VERSION 2
90+
91+
/* Define the following symbol for backward compatibility */
8392
#define EL_PRODUCT_THREADX
84-
#define THREADX_MAJOR_VERSION 5
85-
#define THREADX_MINOR_VERSION 9
8693

8794

8895
/* API input parameters and general constants. */

‎ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s‎

Lines changed: 26 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -20,16 +20,6 @@
2020
;/**************************************************************************/
2121
;/**************************************************************************/
2222
;
23-
;#define TX_SOURCE_CODE
24-
;
25-
;
26-
;/* Include necessary system files. */
27-
;
28-
;#include "tx_api.h"
29-
;#include "tx_initialize.h"
30-
;#include "tx_thread.h"
31-
;#include "tx_timer.h"
32-
;
3323
;
3424
IMPORT _tx_thread_system_stack_ptr
3525
IMPORT _tx_initialize_unused_memory
@@ -87,7 +77,7 @@ __tx_vectors
8777
DCD __tx_IntHandler ; Int 0
8878
DCD __tx_IntHandler ; Int 1
8979
DCD __tx_IntHandler ; Int 2
90-
DCD __tx_IntHandler ; Int 3
80+
DCD __tx_IntHandler ; Int 3
9181
;
9282
;
9383
AREA ||.text||, CODE, READONLY
@@ -96,13 +86,13 @@ Reset_Handler
9686
CPSID i
9787
LDR R0, =__main
9888
BX R0
99-
89+
10090
;/**************************************************************************/
10191
;/* */
10292
;/* FUNCTION RELEASE */
10393
;/* */
10494
;/* _tx_initialize_low_level Cortex-M0/AC5 */
105-
;/* 6.0.1 */
95+
;/* 6.0.2 */
10696
;/* AUTHOR */
10797
;/* */
10898
;/* William E. Lamie, Microsoft Corporation */
@@ -136,45 +126,48 @@ Reset_Handler
136126
;/* DATE NAME DESCRIPTION */
137127
;/* */
138128
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
129+
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
130+
;/* whitespace, resulting */
131+
;/* in version 6.0.2 */
139132
;/* */
140133
;/**************************************************************************/
141134
;VOID _tx_initialize_low_level(VOID)
142135
;{
143136
EXPORT _tx_initialize_low_level
144137
_tx_initialize_low_level
145-
;
138+
;
146139
; /* Ensure that interrupts are disabled. */
147140
;
148141
CPSID i ; Disable interrupts
149142
;
150143
; /* Set base of available memory to end of non-initialised RAM area. */
151-
;
144+
;
152145
LDR r0, =_tx_initialize_unused_memory ; Build address of unused memory pointer
153146
LDR r1, =|Image$$ZI$$Limit| ; Build first free address
154-
ADDS r1, r1, #4 ;
147+
ADDS r1, r1, #4 ;
155148
STR r1, [r0] ; Setup first unused memory pointer
156149
;
157150
; /* Setup Vector Table Offset Register. */
158-
;
151+
;
159152
LDR r0, =0xE000ED08 ; Build address of NVIC registers
160153
LDR r1, =__tx_vectors ; Pickup address of vector table
161-
STR r1, [r0] ; Set vector table address
154+
STR r1, [r0] ; Set vector table address
162155
;
163156
; /* Enable the cycle count register. */
164157
;
165158
; LDR r0, =0xE0001000 ; Build address of DWT register
166159
; LDR r1, [r0] ; Pickup the current value
167160
; MOVS r2, #1
168161
; ORRS r1, r1, r2 ; Set the CYCCNTENA bit
169-
; STR r1, [r0] ; Enable the cycle count register
162+
; STR r1, [r0] ; Enable the cycle count register
170163
;
171164
; /* Setup Vector Table Offset Register. */
172-
;
165+
;
173166
LDR r0, =0xE000E000 ; Build address of NVIC registers
174167
LDR r2, =0xD08 ; Offset to vector base register
175168
ADD r0, r0, r2 ; Build vector base register
176169
LDR r1, =__tx_vectors ; Pickup address of vector table
177-
STR r1, [r0] ; Set vector table address
170+
STR r1, [r0] ; Set vector table address
178171
;
179172
; /* Set system stack pointer from vector value. */
180173
;
@@ -195,30 +188,30 @@ _tx_initialize_low_level
195188
;
196189
LDR r1, =0x00000000 ; Rsrv, UsgF, BusF, MemM
197190
LDR r0, =0xE000E000 ; Build address of NVIC registers
198-
LDR r2, =0xD18 ;
199-
ADD r0, r0, r2 ;
191+
LDR r2, =0xD18 ;
192+
ADD r0, r0, r2 ;
200193
STR r1, [r0] ; Setup System Handlers 4-7 Priority Registers
201194

202195
LDR r1, =0xFF000000 ; SVCl, Rsrv, Rsrv, Rsrv
203196
LDR r0, =0xE000E000 ; Build address of NVIC registers
204-
LDR r2, =0xD1C ;
205-
ADD r0, r0, r2 ;
197+
LDR r2, =0xD1C ;
198+
ADD r0, r0, r2 ;
206199
STR r1, [r0] ; Setup System Handlers 8-11 Priority Registers
207200
; Note: SVC must be lowest priority, which is 0xFF
208201

209202
LDR r1, =0x40FF0000 ; SysT, PnSV, Rsrv, DbgM
210203
LDR r0, =0xE000E000 ; Build address of NVIC registers
211-
LDR r2, =0xD20 ;
212-
ADD r0, r0, r2 ;
204+
LDR r2, =0xD20 ;
205+
ADD r0, r0, r2 ;
213206
STR r1, [r0] ; Setup System Handlers 12-15 Priority Registers
214207
; Note: PnSV must be lowest priority, which is 0xFF
215208
;
216209
; /* Return to caller. */
217-
;
218-
BX lr
210+
;
211+
BX lr
219212
;}
220213
;
221-
;
214+
;
222215
;/* Define initial heap/stack routine for the ARM RVCT startup code.
223216
; This routine will set the initial stack and heap locations */
224217
;
@@ -239,14 +232,14 @@ __tx_BadHandler
239232

240233
EXPORT __tx_SVCallHandler
241234
__tx_SVCallHandler
242-
B __tx_SVCallHandler
235+
B __tx_SVCallHandler
243236

244237
EXPORT __tx_IntHandler
245238
__tx_IntHandler
246239
; VOID InterruptHandler (VOID)
247240
; {
248241
PUSH {r0, lr}
249-
242+
250243
; /* Do interrupt handler work here */
251244
; /* .... */
252245

@@ -269,7 +262,7 @@ SysTick_Handler
269262
BX lr
270263
; }
271264

272-
EXPORT __tx_NMIHandler
265+
EXPORT __tx_NMIHandler
273266
__tx_NMIHandler
274267
B __tx_NMIHandler
275268

@@ -280,5 +273,3 @@ __tx_DBGHandler
280273
ALIGN
281274
LTORG
282275
END
283-
284-

‎ports/cortex_m0/ac5/readme_threadx.txt‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,11 @@ For generic code revision information, please refer to the readme_threadx_generi
133133
file, which is included in your distribution. The following details the revision
134134
information associated with this specific port of ThreadX:
135135

136+
08-14-2020 ThreadX update of Cortex-M0/AC5 port. The following files were
137+
changed/added for port specific version 6.0.2:
138+
139+
*.s Modified comments and whitespace.
140+
136141
06/30/2020 Initial ThreadX 6.0.1 version for Cortex-M0 using AC5 tools.
137142

138143

‎ports/cortex_m0/ac5/src/tx_thread_context_restore.s‎

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -20,16 +20,6 @@
2020
;/**************************************************************************/
2121
;/**************************************************************************/
2222
;
23-
;
24-
;#define TX_SOURCE_CODE
25-
;
26-
;
27-
;/* Include necessary system files. */
28-
;
29-
;#include "tx_api.h"
30-
;#include "tx_thread.h"
31-
;#include "tx_timer.h"
32-
;
3323
;
3424
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
3525
IMPORT _tx_execution_isr_exit
@@ -42,13 +32,15 @@
4232
;/* FUNCTION RELEASE */
4333
;/* */
4434
;/* _tx_thread_context_restore Cortex-M0/AC5 */
45-
;/* 6.0.1 */
35+
;/* 6.0.2 */
4636
;/* AUTHOR */
4737
;/* */
4838
;/* William E. Lamie, Microsoft Corporation */
4939
;/* */
5040
;/* DESCRIPTION */
5141
;/* */
42+
;/* This function is only needed for legacy applications and it should */
43+
;/* not be called in any new development on a Cortex-M. */
5244
;/* This function restores the interrupt context if it is processing a */
5345
;/* nested interrupt. If not, it returns to the interrupt thread if no */
5446
;/* preemption is necessary. Otherwise, if preemption is necessary or */
@@ -75,6 +67,9 @@
7567
;/* DATE NAME DESCRIPTION */
7668
;/* */
7769
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
70+
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
71+
;/* whitespace, resulting */
72+
;/* in version 6.0.2 */
7873
;/* */
7974
;/**************************************************************************/
8075
;VOID _tx_thread_context_restore(VOID)
@@ -98,4 +93,3 @@ _tx_thread_context_restore
9893
ALIGN
9994
LTORG
10095
END
101-

‎ports/cortex_m0/ac5/src/tx_thread_context_save.s‎

Lines changed: 7 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -20,16 +20,6 @@
2020
;/**************************************************************************/
2121
;/**************************************************************************/
2222
;
23-
;
24-
;#define TX_SOURCE_CODE
25-
;
26-
;
27-
;/* Include necessary system files. */
28-
;
29-
;#include "tx_api.h"
30-
;#include "tx_thread.h"
31-
;#include "tx_timer.h"
32-
;
3323
;
3424
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
3525
IMPORT _tx_execution_isr_enter
@@ -43,13 +33,15 @@
4333
;/* FUNCTION RELEASE */
4434
;/* */
4535
;/* _tx_thread_context_save Cortex-M0/AC5 */
46-
;/* 6.0.1 */
36+
;/* 6.0.2 */
4737
;/* AUTHOR */
4838
;/* */
4939
;/* William E. Lamie, Microsoft Corporation */
5040
;/* */
5141
;/* DESCRIPTION */
5242
;/* */
43+
;/* This function is only needed for legacy applications and it should */
44+
;/* not be called in any new development on a Cortex-M. */
5345
;/* This function saves the context of an executing thread in the */
5446
;/* beginning of interrupt processing. The function also ensures that */
5547
;/* the system stack is used upon return to the calling ISR. */
@@ -75,6 +67,9 @@
7567
;/* DATE NAME DESCRIPTION */
7668
;/* */
7769
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
70+
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
71+
;/* whitespace, resulting */
72+
;/* in version 6.0.2 */
7873
;/* */
7974
;/**************************************************************************/
8075
;VOID _tx_thread_context_save(VOID)
@@ -92,10 +87,9 @@ _tx_thread_context_save
9287
ENDIF
9388
;
9489
; /* Return to interrupt processing. */
95-
;
90+
;
9691
BX lr ; Return to interrupt processing caller
9792
;}
9893
ALIGN
9994
LTORG
10095
END
101-

‎ports/cortex_m0/ac5/src/tx_thread_interrupt_control.s‎

Lines changed: 4 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -20,22 +20,14 @@
2020
;/**************************************************************************/
2121
;/**************************************************************************/
2222
;
23-
;#define TX_SOURCE_CODE
24-
;
25-
;
26-
;/* Include necessary system files. */
27-
;
28-
;#include "tx_api.h"
29-
;#include "tx_thread.h"
30-
;
3123
;
3224
AREA ||.text||, CODE, READONLY
3325
;/**************************************************************************/
3426
;/* */
3527
;/* FUNCTION RELEASE */
3628
;/* */
3729
;/* _tx_thread_interrupt_control Cortex-M0/AC5 */
38-
;/* 6.0.1 */
30+
;/* 6.0.2 */
3931
;/* AUTHOR */
4032
;/* */
4133
;/* William E. Lamie, Microsoft Corporation */
@@ -66,6 +58,9 @@
6658
;/* DATE NAME DESCRIPTION */
6759
;/* */
6860
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
61+
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
62+
;/* whitespace, resulting */
63+
;/* in version 6.0.2 */
6964
;/* */
7065
;/**************************************************************************/
7166
;UINT _tx_thread_interrupt_control(UINT new_posture)
@@ -84,4 +79,3 @@ _tx_thread_interrupt_control
8479
ALIGN
8580
LTORG
8681
END
87-

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