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Add hits and misses timing stats to DLS cache #133314
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f765766
Add hits and misses timing stats to DLS cache
szybia 2d2dd9d
Update docs/changelog/133314.yaml
szybia 84c67c8
Inline these initializations
joegallo 0238156
Reorder these declarations for consistency
joegallo 72ff3c0
Rename this variable
joegallo 36c2e8e
Use a final array as a mutable box
joegallo 472af6e
Merge branch 'main' into pull/133314
joegallo 94cb1b6
Merge branch 'main' into extra-stats-into-dls
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,5 @@ | ||
| pr: 133314 | ||
| summary: Add hits and misses timing stats to DLS cache | ||
| area: Authorization | ||
| type: enhancement | ||
| issues: [] |
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Let's not introduce an
AtomicBooleanfor this. You're single threaded here anyway (right?), so this could just be an ordinary old mutablebooleanrather than afinal.Beyond that, though, I suspect I'd prefer if this were done by threading the logic in where it needs to be rather than separating it (and needing a variable at all).edit: disregard that, the other places where we don't do this are patterned differently. It's interesting to me that these three caches have such different little details in some places.There was a problem hiding this comment.
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Ah, the problem is the callback and the need for it to be a final variable -- there's a pattern of using final 1-length arrays as final-but-mutable box for this.
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yah seen the
cacheKeyWasPresent[0] = false;approach beforeno strong opinions so fine with it, but was my first time seeing it and was a bit confused initially
so went with this since more readable imo
i'd be curious to know whether there were any previous issues around AtomicBoolean, from ignorance and intuition given zero contention and this just being a object allocation, can't imagine many problems here
anyway 🤷