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2 changes: 2 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -10,3 +10,5 @@ Cargo.lock

# These are backup files generated by rustfmt
**/*.rs.bk

.DS_Store
10 changes: 8 additions & 2 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -9,12 +9,18 @@ repository = "https://github.com/embassy-rs/nrf-pac"
documentation = "https://docs.embassy.dev/nrf-pac"

[dependencies]
defmt = { version = "0.3.10", optional = true }

[target.'cfg(target_arch = "arm")'.dependencies]
cortex-m = "0.7.1"
cortex-m-rt = { version = ">=0.6.15,<0.8", optional = true }
defmt = { version = "0.3.10", optional = true }

[target.'cfg(target_arch = "riscv32")'.dependencies]
riscv = "0.12.1"
riscv-rt = { version = "0.13.0", optional = true }

[features]
rt = ["cortex-m-rt/device"]
rt = ["cortex-m-rt/device", "riscv-rt"]
defmt = ["dep:defmt"]

nrf51 = []
Expand Down
5 changes: 4 additions & 1 deletion rust-toolchain.toml
Original file line number Diff line number Diff line change
@@ -1,8 +1,11 @@
[toolchain]
channel = "nightly-2024-11-04"
components = [ "rust-src", "rustfmt" ]
components = ["rust-src", "rustfmt"]
targets = [
"thumbv6m-none-eabi",
"thumbv7em-none-eabihf",
"thumbv8m.main-none-eabihf",

# Tier 3 target, so it cannot be installed with rustup
# "riscv32emc-unknown-none-elf"
]
8 changes: 6 additions & 2 deletions src/chips/nrf54l15-flpr/pac.rs
Original file line number Diff line number Diff line change
Expand Up @@ -173,12 +173,16 @@ pub enum Interrupt {
#[doc = "270 - CLOCK_POWER"]
CLOCK_POWER = 270,
}

/*
unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
#[inline(always)]
fn number(self) -> u16 {
self as u16
}
}
*/

#[cfg(feature = "rt")]
mod _vectors {
extern "C" {
Expand Down Expand Up @@ -984,8 +988,8 @@ pub const CRACENCORE_S: cracencore::Cracencore =
unsafe { cracencore::Cracencore::from_ptr(0x5180_0000usize as _) };
#[doc = "VPR CLIC registers"]
pub const VPRCLIC_NS: clic::Clic = unsafe { clic::Clic::from_ptr(0xf000_0000usize as _) };
#[cfg(feature = "rt")]
pub use cortex_m_rt::interrupt;
//#[cfg(feature = "rt")]
//pub use cortex_m_rt::interrupt;
#[cfg(feature = "rt")]
pub use Interrupt as interrupt;
pub mod aar {
Expand Down
35 changes: 29 additions & 6 deletions update.sh
Original file line number Diff line number Diff line change
Expand Up @@ -16,20 +16,43 @@ rm -rf src/chips
export RUST_BACKTRACE=1
#export RUST_LOG=info

for chip in $(ls svd); do
for chip in $(ls svd); do
chip=${chip%.*}
chiptool generate --svd svd/$chip.svd --transform transform.yaml

if [ "$chip" = "nrf54l15-flpr" ]; then
target="riscv"
else
target="cortex-m"
fi
chiptool generate --svd svd/$chip.svd --transform transform.yaml --target $target
rustfmt lib.rs
sed -i '/#!\[no_std]/d' lib.rs

sed -i '' '/#!\[no_std]/d' lib.rs

mkdir -p src/chips/$chip
mv lib.rs src/chips/$chip/pac.rs
mv device.x src/chips/$chip/device.x
done

cargo fmt
for chip in $(ls svd); do

# Actual target doesn't matter for the check, but it must be a valid Cortex-M target
cortex_m_target="thumbv7em-none-eabihf"
riscv_target="riscv32emc-unknown-none-elf"


for chip in $(ls svd); do
chip=${chip%.*}
cargo check --features $chip
cargo doc --features $chip

if [ "$chip" = "nrf54l15-flpr" ]; then
target=$riscv_target
additional_args="-Zbuild-std=core,compiler_builtins"
else
target=$cortex_m_target
additional_args=""
fi


cargo check --features $chip --target $target $additional_args
cargo doc --features $chip --target $target $additional_args
done