bckup

Author: JurajSadel

.github/workflows/hil.yml

@@ -86,6 +86,8 @@ jobs:
           - soc: esp32h2
             rust-target: riscv32imac-unknown-none-elf
           # # Xtensa devices:
+          - soc: esp32
+            rust-target: xtensa-esp32-none-elf
           - soc: esp32s2
             rust-target: xtensa-esp32s2-none-elf
           - soc: esp32s3
@@ -168,6 +170,10 @@ jobs:
             host: armv7
             hubs: "1-1"
           # Xtensa devices:
+          - soc: esp32
+            runner: esp32-jtag
+            usb: USB1 # ESP32 HIL TODO
+            host: aarch64
           - soc: esp32s2
             runner: esp32s2-jtag
             host: armv7

hil-test/tests/ecc.rs

@@ -1,6 +1,6 @@
 //! ECC Test
 
-//% CHIPS: esp32 esp32c2 esp32c6 esp32h2
+//% CHIPS: esp32c2 esp32c6 esp32h2
 
 #![no_std]
 #![no_main]

hil-test/tests/gpio.rs

@@ -14,7 +14,7 @@ use core::cell::RefCell;
 
 use critical_section::Mutex;
 #[cfg(feature = "esp32")]
-use esp_hal::gpio::Gpio0;
+use esp_hal::gpio::Gpio4;
 #[cfg(not(feature = "esp32"))]
 use esp_hal::gpio::Gpio3;
 use esp_hal::{

hil-test/tests/i2s_async.rs

@@ -91,6 +91,9 @@ mod tests {
         let mut io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 
         let dma = Dma::new(peripherals.DMA);
+        #[cfg(any(feature = "esp32", feature = "esp32s2"))]
+        let dma_channel = dma.i2s0channel;
+        #[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
         let dma_channel = dma.channel0;
 
         let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) =

hil-test/tests/sha.rs

@@ -239,6 +239,7 @@ mod tests {
         }
     }
 
+    #[cfg(not(feature = "esp32"))]
     /// A rolling test that loops between hasher for every step to test
     /// interleaving. This specifically test the Sha trait implementation
     #[test]

hil-test/tests/spi_full_duplex_dma_async.rs

@@ -14,7 +14,7 @@
 //!
 //! Connect PCNT and MOSI, MISO and GPIO5 pins.
 
-//% CHIPS: esp32 esp32c6 esp32h2 esp32s3
+//% CHIPS: esp32c6 esp32h2 esp32s3
 //% FEATURES: generic-queue
 
 #![no_std]

hil-test/tests/spi_full_duplex_dma_pcnt.rs

@@ -12,7 +12,7 @@
 //!
 //! Connect MISO and MOSI pins.
 
-//% CHIPS: esp32 esp32c6 esp32h2 esp32s3
+//% CHIPS: esp32c6 esp32h2 esp32s3
 
 #![no_std]
 #![no_main]