SPI: add missing tests, fix half-duplex abort issue, clean up (#5247)

* Ungate non-dma related test

* Add CPU-driven QSPI tests

* Clean up CPU-controlled SPI master driver

* Clean up SPI future

* Flush before configuring full duplex mode

* Extract write start logic

* Flush before starting half-duplex ops

* Clean up half-duplex write setup

* Use write_one more

* Clean up SpiPinGuard

* Clean TransferDone before starting operation

* Restore flush at the end of transfer_async

Author: bugadani

esp-hal/CHANGELOG.md

@@ -118,6 +118,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Increase the size of `irom_seg`/`drom_seg` from 4 MB to 32 MB for the ESP32-S3 (#5121)
 - UART and I2C inputs are now correctly defined when creating drivers (#5214)
 - The `SpiBus::transfer` (both from `embedded_hal` and `embedded_hal_async`) implementations of `esp_hal::spi::master::Spi` no longer write more data than they need to (#5245)
+- Fixed a bug in `Spi::half_duplex_{read, write}` where calling these functions aborted previously running writes (#5247)
 
 ### Removed
 

esp-hal/src/gpio/mod.rs

@@ -114,7 +114,7 @@ impl PinGuard {
         Self { pin: pin.number() }
     }
 
-    pub(crate) fn new_unconnected() -> Self {
+    pub(crate) const fn new_unconnected() -> Self {
         Self { pin: u8::MAX }
     }