Refactor getFlashClockDivider for ESP32 target

Author: Jason2866

cores/esp32/Esp.cpp

@@ -39,7 +39,9 @@ extern "C" {
 
 // Include HAL layer for flash clock access
 #include "hal/spi_flash_ll.h"
-#if !CONFIG_IDF_TARGET_ESP32
+#if CONFIG_IDF_TARGET_ESP32
+#include "soc/spi_struct.h"
+#else
 #include "hal/spimem_flash_ll.h"
 #include "soc/spi_mem_struct.h"
 #endif
@@ -549,18 +551,11 @@ uint8_t EspClass::getFlashSourceFrequencyMHz(void) {
  */
 uint8_t EspClass::getFlashClockDivider(void) {
 #if CONFIG_IDF_TARGET_ESP32
-  // ESP32 classic: Read CLOCK register directly (no SPIMEM structure available)
-  volatile uint32_t* clock_reg = (volatile uint32_t*)(DR_REG_SPI0_BASE + 0x14);
-  uint32_t clock_val = *clock_reg;
-  
-  // Bit 31: if set, clock is 1:1 (no divider)
-  if (clock_val & (1 << 31)) {
-    return 1;
+  // ESP32 classic: Use SPI0 structure
+  if (SPI0.clock.clk_equ_sysclk) {
+    return 1;  // 1:1 clock (no divider)
   }
-  
-  // Bits 16-23: clkdiv_pre
-  uint8_t clkdiv_pre = (clock_val >> 16) & 0xFF;
-  return clkdiv_pre + 1;
+  return SPI0.clock.clkcnt_n + 1;
 #else
   // Modern chips (S2, S3, C2, C3, C5, C6, H2, P4): Use SPIMEM0 structure
   if (SPIMEM0.clock.clk_equ_sysclk) {