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esp-wzhesp-wzh
committed
Merge branch 'feat/support_esp32h4_pau' into 'master'
feat(esp_hw_support): add esp32h4 PAU initial support Closes PM-444 See merge request espressif/esp-idf!39951
2 parents 0972e9d + d629302 commit 01753bf

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23 files changed

+671
-229
lines changed

23 files changed

+671
-229
lines changed

‎components/hal/esp32c5/include/hal/lp_aon_ll.h‎

Lines changed: 1 addition & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -85,54 +85,6 @@ static inline void lp_aon_ll_inform_wakeup_type(bool dslp)
8585
}
8686
}
8787

88-
/**
89-
* @brief Set the maximum number of linked lists supported by REGDMA
90-
* @param count: the maximum number of regdma link
91-
*/
92-
static inline void lp_aon_ll_set_regdma_link_count(int count)
93-
{
94-
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg0, branch_link_length_aon, count);
95-
}
96-
97-
/**
98-
* @brief Set the maximum number of times a single linked list can run for REGDMA. If a linked list continuously reads in a loop
99-
* for some reason and the execution count exceeds this configured number, a timeout will be triggered.
100-
* @param count: the maximum number of loop
101-
*/
102-
static inline void lp_aon_ll_set_regdma_link_loop_threshold(int count)
103-
{
104-
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg1, link_work_tout_thres_aon, count);
105-
}
106-
107-
/**
108-
* @brief Set the timeout duration for accessing registers. If REGDMA encounters bus-related issues while accessing
109-
* registers and gets stuck on the bus, a timeout will be triggered.
110-
* @param count: the maximum number of time
111-
*/
112-
static inline void lp_aon_ll_set_regdma_link_reg_access_tout_threshold(int count)
113-
{
114-
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg1, link_backup_tout_thres_aon, count);
115-
}
116-
117-
/**
118-
* @brief Set the regdma_link_addr
119-
* @param addr: the addr of regdma_link
120-
*/
121-
static inline void lp_aon_ll_set_regdma_link_addr(uint32_t addr)
122-
{
123-
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg2, link_addr_aon, addr);
124-
}
125-
126-
static inline void lp_aon_ll_set_regdma_link_wait_retry_count(int count)
127-
{
128-
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg1, link_wait_tout_thres_aon, count);
129-
}
130-
131-
static inline void lp_aon_ll_set_regdma_link_wait_read_interval(int interval)
132-
{
133-
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg0, read_interval_aon, interval);
134-
}
135-
13688
#ifdef __cplusplus
13789
}
13890
#endif

‎components/hal/esp32c5/include/hal/pau_ll.h‎

Lines changed: 58 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -14,8 +14,10 @@
1414
#include "soc/pau_reg.h"
1515
#include "soc/pau_struct.h"
1616
#include "soc/pcr_struct.h"
17+
#include "soc/lp_aon_struct.h"
1718
#include "hal/pau_types.h"
1819
#include "hal/assert.h"
20+
#include "hal/misc.h"
1921

2022
#ifdef __cplusplus
2123
extern "C" {
@@ -47,14 +49,9 @@ static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev,
4749
dev->regdma_conf.to_mem = to_mem ? 1 : 0;
4850
}
4951

50-
static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
52+
static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev, bool enable)
5153
{
52-
dev->regdma_conf.start = 1;
53-
}
54-
55-
static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
56-
{
57-
dev->regdma_conf.start = 0;
54+
dev->regdma_conf.start = enable;
5855
}
5956

6057
static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
@@ -107,14 +104,9 @@ static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
107104
return dev->int_st.val;
108105
}
109106

110-
static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
111-
{
112-
dev->int_ena.done_int_ena = 1;
113-
}
114-
115-
static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
107+
static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev, bool enable)
116108
{
117-
dev->int_ena.done_int_ena = 0;
109+
dev->int_ena.done_int_ena = enable;
118110
}
119111

120112
static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev)
@@ -129,12 +121,61 @@ static inline void pau_ll_set_regdma_backup_error_intr_disable(pau_dev_t *dev)
129121

130122
static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
131123
{
132-
dev->int_clr.done_int_clr = 1;
124+
dev->int_clr.val = 0x1;
133125
}
134126

135127
static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
136128
{
137-
dev->int_clr.error_int_clr = 1;
129+
dev->int_clr.val = 0x2;
130+
}
131+
132+
133+
/**
134+
* @brief Set the maximum number of linked lists supported by REGDMA
135+
* @param count: the maximum number of regdma link
136+
*/
137+
static inline void pau_ll_set_regdma_link_count(int count)
138+
{
139+
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg0, branch_link_length_aon, count);
140+
}
141+
142+
/**
143+
* @brief Set the maximum number of times a single linked list can run for REGDMA. If a linked list continuously reads in a loop
144+
* for some reason and the execution count exceeds this configured number, a timeout will be triggered.
145+
* @param count: the maximum number of loop
146+
*/
147+
static inline void pau_ll_set_regdma_link_loop_threshold(int count)
148+
{
149+
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg1, link_work_tout_thres_aon, count);
150+
}
151+
152+
/**
153+
* @brief Set the timeout duration for accessing registers. If REGDMA encounters bus-related issues while accessing
154+
* registers and gets stuck on the bus, a timeout will be triggered.
155+
* @param count: the maximum number of time
156+
*/
157+
static inline void pau_ll_set_regdma_link_reg_access_tout_threshold(int count)
158+
{
159+
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg1, link_backup_tout_thres_aon, count);
160+
}
161+
162+
/**
163+
* @brief Set the regdma_link_addr
164+
* @param addr: the addr of regdma_link
165+
*/
166+
static inline void pau_ll_set_regdma_link_addr(uint32_t addr)
167+
{
168+
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg2, link_addr_aon, addr);
169+
}
170+
171+
static inline void pau_ll_set_regdma_link_wait_retry_count(int count)
172+
{
173+
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg1, link_wait_tout_thres_aon, count);
174+
}
175+
176+
static inline void pau_ll_set_regdma_link_wait_read_interval(int interval)
177+
{
178+
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg0, read_interval_aon, interval);
138179
}
139180

140181
#ifdef __cplusplus

‎components/hal/esp32c5/pau_hal.c‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -12,7 +12,7 @@
1212

1313
void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr)
1414
{
15-
lp_aon_ll_set_regdma_link_addr((uint32_t)(*link_addr)[0]);
15+
pau_ll_set_regdma_link_addr((uint32_t)(*link_addr)[0]);
1616
}
1717

1818
void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
@@ -43,14 +43,14 @@ void IRAM_ATTR pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool back
4343
*/
4444
pau_ll_select_regdma_entry_link(hal->dev, 3);
4545
pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore);
46-
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev);
46+
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, true);
4747

4848
while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
4949
}
5050

5151
void IRAM_ATTR pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
5252
{
53-
pau_ll_set_regdma_entry_link_backup_start_disable(hal->dev);
53+
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, false);
5454
pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
5555
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
5656
}
@@ -59,20 +59,20 @@ void IRAM_ATTR pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
5959
void pau_hal_regdma_link_count_config(pau_hal_context_t *hal, int count)
6060
{
6161
HAL_ASSERT(count > 0);
62-
lp_aon_ll_set_regdma_link_count(count - 1);
62+
pau_ll_set_regdma_link_count(count - 1);
6363
}
6464
#endif
6565

6666
void pau_hal_set_regdma_work_timeout(pau_hal_context_t *hal, uint32_t loop_num, uint32_t time)
6767
{
6868
HAL_ASSERT(loop_num > 0 && time > 0);
69-
lp_aon_ll_set_regdma_link_loop_threshold(loop_num);
70-
lp_aon_ll_set_regdma_link_reg_access_tout_threshold(time);
69+
pau_ll_set_regdma_link_loop_threshold(loop_num);
70+
pau_ll_set_regdma_link_reg_access_tout_threshold(time);
7171
}
7272

7373
void pau_hal_set_regdma_wait_timeout(pau_hal_context_t *hal, int count, int interval)
7474
{
7575
HAL_ASSERT(count > 0 && interval > 0);
76-
lp_aon_ll_set_regdma_link_wait_retry_count(count);
77-
lp_aon_ll_set_regdma_link_wait_read_interval(interval);
76+
pau_ll_set_regdma_link_wait_retry_count(count);
77+
pau_ll_set_regdma_link_wait_read_interval(interval);
7878
}

‎components/hal/esp32c6/include/hal/pau_ll.h‎

Lines changed: 7 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -47,14 +47,9 @@ static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev,
4747
dev->regdma_conf.to_mem = to_mem ? 1 : 0;
4848
}
4949

50-
static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
50+
static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev, bool enable)
5151
{
52-
dev->regdma_conf.start = 1;
53-
}
54-
55-
static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
56-
{
57-
dev->regdma_conf.start = 0;
52+
dev->regdma_conf.start = enable;
5853
}
5954

6055
static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
@@ -132,14 +127,9 @@ static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
132127
return dev->int_st.val;
133128
}
134129

135-
static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
136-
{
137-
dev->int_ena.done_int_ena = 1;
138-
}
139-
140-
static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
130+
static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev, bool enable)
141131
{
142-
dev->int_ena.done_int_ena = 0;
132+
dev->int_ena.done_int_ena = enable;
143133
}
144134

145135
static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
@@ -149,12 +139,12 @@ static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bo
149139

150140
static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
151141
{
152-
dev->int_clr.done_int_clr = 1;
142+
dev->int_clr.val = 0x1;
153143
}
154144

155145
static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
156146
{
157-
dev->int_clr.error_int_clr = 1;
147+
dev->int_clr.val = 0x2;
158148
}
159149

160150
static inline void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)

‎components/hal/esp32c6/pau_hal.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -46,14 +46,14 @@ void IRAM_ATTR pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool back
4646
*/
4747
pau_ll_select_regdma_entry_link(hal->dev, 3);
4848
pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore);
49-
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev);
49+
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, true);
5050

5151
while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
5252
}
5353

5454
void IRAM_ATTR pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
5555
{
56-
pau_ll_set_regdma_entry_link_backup_start_disable(hal->dev);
56+
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, false);
5757
pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
5858
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
5959
}

‎components/hal/esp32c61/include/hal/pau_ll.h‎

Lines changed: 7 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -47,14 +47,9 @@ static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev,
4747
dev->regdma_conf.to_mem = to_mem ? 1 : 0;
4848
}
4949

50-
static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
50+
static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev, bool enable)
5151
{
52-
dev->regdma_conf.start = 1;
53-
}
54-
55-
static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
56-
{
57-
dev->regdma_conf.start = 0;
52+
dev->regdma_conf.start = enable;
5853
}
5954

6055
static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
@@ -132,14 +127,9 @@ static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
132127
return dev->int_st.val;
133128
}
134129

135-
static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
136-
{
137-
dev->int_ena.done_int_ena = 1;
138-
}
139-
140-
static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
130+
static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev, bool enable)
141131
{
142-
dev->int_ena.done_int_ena = 0;
132+
dev->int_ena.done_int_ena = enable;
143133
}
144134

145135
static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
@@ -149,12 +139,12 @@ static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bo
149139

150140
static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
151141
{
152-
dev->int_clr.done_int_clr = 1;
142+
dev->int_clr.val = 0x1;
153143
}
154144

155145
static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
156146
{
157-
dev->int_clr.error_int_clr = 1;
147+
dev->int_clr.val = 0x2;
158148
}
159149

160150
static inline void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)

‎components/hal/esp32c61/pau_hal.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -46,14 +46,14 @@ void IRAM_ATTR pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool back
4646
*/
4747
pau_ll_select_regdma_entry_link(hal->dev, 3);
4848
pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore);
49-
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev);
49+
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, true);
5050

5151
while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
5252
}
5353

5454
void IRAM_ATTR pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
5555
{
56-
pau_ll_set_regdma_entry_link_backup_start_disable(hal->dev);
56+
pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, false);
5757
pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
5858
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
5959
}

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