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KainarxKainarx
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refactor(gptimer): use group_id in clock ctrl functions
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19 files changed

+105
-98
lines changed

19 files changed

+105
-98
lines changed

‎components/driver/deprecated/timer_legacy.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -332,8 +332,8 @@ esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer
332332
GPTIMER_CLOCK_SRC_ATOMIC() {
333333
// although `clk_src` is of `timer_src_clk_t` type, but it's binary compatible with `gptimer_clock_source_t`,
334334
// as the underlying enum entries come from the same `soc_module_clk_t`
335-
timer_ll_set_clock_source(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, (gptimer_clock_source_t)clk_src);
336-
timer_ll_enable_clock(hal->dev, timer_num, true);
335+
timer_ll_set_clock_source(group_num, timer_num, (gptimer_clock_source_t)clk_src);
336+
timer_ll_enable_clock(group_num, timer_num, true);
337337
}
338338
timer_ll_set_clock_prescale(hal->dev, timer_num, config->divider);
339339
timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, config->counter_dir);
@@ -362,7 +362,7 @@ esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num)
362362

363363
// disable the source clock
364364
GPTIMER_CLOCK_SRC_ATOMIC() {
365-
timer_ll_enable_clock(hal->dev, hal->timer_id, false);
365+
timer_ll_enable_clock(group_num, hal->timer_id, false);
366366
}
367367
TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
368368
timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false);

‎components/esp_driver_gptimer/src/gptimer.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -195,7 +195,7 @@ esp_err_t gptimer_del_timer(gptimer_handle_t timer)
195195
ESP_LOGD(TAG, "del timer (%d,%d)", group_id, timer_id);
196196
// disable the source clock
197197
GPTIMER_CLOCK_SRC_ATOMIC() {
198-
timer_ll_enable_clock(hal->dev, hal->timer_id, false);
198+
timer_ll_enable_clock(group_id, hal->timer_id, false);
199199
}
200200
timer_hal_deinit(hal);
201201
// recycle memory resource

‎components/esp_driver_gptimer/src/gptimer_common.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s
9090
{
9191
uint32_t counter_src_hz = 0;
9292
int timer_id = timer->timer_id;
93-
93+
int group_id = timer->group->group_id;
9494
// TODO: [clk_tree] to use a generic clock enable/disable or acquire/release function for all clock source
9595
#if SOC_TIMER_GROUP_SUPPORT_RC_FAST
9696
if (src_clk == GPTIMER_CLK_SRC_RC_FAST) {
@@ -134,7 +134,7 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s
134134
#endif // CONFIG_IDF_TARGET_ESP32C2
135135

136136
if (need_pm_lock) {
137-
sprintf(timer->pm_lock_name, "gptimer_%d_%d", timer->group->group_id, timer_id); // e.g. gptimer_0_0
137+
sprintf(timer->pm_lock_name, "gptimer_%d_%d", group_id, timer_id); // e.g. gptimer_0_0
138138
ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, timer->pm_lock_name, &timer->pm_lock),
139139
TAG, "create pm lock failed");
140140
}
@@ -145,8 +145,8 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s
145145
// on some ESP chip, different peripheral's clock source setting are mixed in the same register
146146
// so we need to make this done in an atomic way
147147
GPTIMER_CLOCK_SRC_ATOMIC() {
148-
timer_ll_set_clock_source(timer->hal.dev, timer_id, src_clk);
149-
timer_ll_enable_clock(timer->hal.dev, timer_id, true);
148+
timer_ll_set_clock_source(group_id, timer_id, src_clk);
149+
timer_ll_enable_clock(group_id, timer_id, true);
150150
}
151151
timer->clk_src = src_clk;
152152
uint32_t prescale = counter_src_hz / resolution_hz; // potential resolution loss here

‎components/esp_system/port/soc/esp32c6/clk.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -255,8 +255,8 @@ __attribute__((weak)) void esp_perip_clk_init(void)
255255
rmt_ll_enable_group_clock(0, false);
256256
ledc_ll_enable_clock(&LEDC, false);
257257
ledc_ll_enable_bus_clock(false);
258-
timer_ll_enable_clock(&TIMERG0, 0, false);
259-
timer_ll_enable_clock(&TIMERG1, 0, false);
258+
timer_ll_enable_clock(0, 0, false);
259+
timer_ll_enable_clock(1, 0, false);
260260
_timer_ll_enable_bus_clock(0, false);
261261
_timer_ll_enable_bus_clock(1, false);
262262
twai_ll_enable_clock(0, false);

‎components/esp_system/port/soc/esp32h2/clk.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -244,8 +244,8 @@ __attribute__((weak)) void esp_perip_clk_init(void)
244244
rmt_ll_enable_group_clock(0, false);
245245
ledc_ll_enable_clock(&LEDC, false);
246246
ledc_ll_enable_bus_clock(false);
247-
timer_ll_enable_clock(&TIMERG0, 0, false);
248-
timer_ll_enable_clock(&TIMERG1, 0, false);
247+
timer_ll_enable_clock(0, 0, false);
248+
timer_ll_enable_clock(1, 0, false);
249249
_timer_ll_enable_bus_clock(0, false);
250250
_timer_ll_enable_bus_clock(1, false);
251251
twai_ll_enable_clock(0, false);

‎components/esp_system/port/soc/esp32p4/clk.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -276,12 +276,12 @@ __attribute__((weak)) void esp_perip_clk_init(void)
276276
_uart_ll_sclk_disable(&UART4);
277277

278278
_timer_ll_enable_bus_clock(0, false);
279-
_timer_ll_enable_clock(&TIMERG0, 0, false);
280-
_timer_ll_enable_clock(&TIMERG0, 1, false);
279+
_timer_ll_enable_clock(0, 0, false);
280+
_timer_ll_enable_clock(0, 1, false);
281281

282282
_timer_ll_enable_bus_clock(1, false);
283-
_timer_ll_enable_clock(&TIMERG1, 0, false);
284-
_timer_ll_enable_clock(&TIMERG1, 1, false);
283+
_timer_ll_enable_clock(1, 0, false);
284+
_timer_ll_enable_clock(1, 1, false);
285285

286286
mipi_dsi_brg_ll_enable_ref_clock(&MIPI_DSI_BRIDGE, false);
287287
_mipi_csi_ll_enable_host_bus_clock(0, false);

‎components/esp_tee/test_apps/tee_test_fw/components/test_sec_srv/src/test_interrupt.c‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -23,6 +23,7 @@
2323
#define TIMER_ALARM_PERIOD_S 0.10 // sample test interval for the first timer
2424

2525
/* TEE uses Group0 Timer0 */
26+
#define TEE_SECURE_GROUP 0
2627
#define TEE_SECURE_TIMER 0
2728

2829
static const char *TAG = "esp_tee_intr_test";
@@ -56,16 +57,17 @@ static void tee_timer_enable(void)
5657
ESP_LOGI(TAG, "Enabling test timer from secure world");
5758

5859
/* Enable TG0 peripheral module */
59-
periph_ll_enable_clk_clear_rst(PERIPH_TIMG0_MODULE);
60+
_timer_ll_enable_bus_clock(TEE_SECURE_GROUP, true);
61+
_timer_ll_reset_register(TEE_SECURE_GROUP);
6062

6163
/* Stop counter, alarm, auto-reload at first place */
62-
timer_ll_enable_clock(timg_hw, TEE_SECURE_TIMER, true);
64+
timer_ll_enable_clock(TEE_SECURE_GROUP, TEE_SECURE_TIMER, true);
6365
timer_ll_enable_counter(timg_hw, TEE_SECURE_TIMER, false);
6466
timer_ll_enable_auto_reload(timg_hw, TEE_SECURE_TIMER, false);
6567
timer_ll_enable_alarm(timg_hw, TEE_SECURE_TIMER, false);
6668

6769
// Set clock source
68-
timer_ll_set_clock_source(timg_hw, TEE_SECURE_TIMER, GPTIMER_CLK_SRC_DEFAULT);
70+
timer_ll_set_clock_source(TEE_SECURE_GROUP, TEE_SECURE_TIMER, GPTIMER_CLK_SRC_DEFAULT);
6971
timer_ll_set_clock_prescale(timg_hw, TEE_SECURE_TIMER, TIMER_DIVIDER);
7072

7173
// Initialize counter value to zero

‎components/hal/esp32/include/hal/timer_ll.h‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -76,12 +76,14 @@ static inline void _timer_ll_reset_register(int group_id)
7676
/**
7777
* @brief Set clock source for timer
7878
*
79-
* @param hw Timer Group register base address
79+
* @param group_id Group ID
8080
* @param timer_num Timer number in the group
8181
* @param clk_src Clock source
8282
*/
83-
static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src)
83+
static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src)
8484
{
85+
(void)group_id;
86+
(void)timer_num;
8587
switch (clk_src) {
8688
case GPTIMER_CLK_SRC_APB:
8789
break;
@@ -96,13 +98,13 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num,
9698
*
9799
* @note This function is not optional, created for backward compatible.
98100
*
99-
* @param hw Timer Group register base address
101+
* @param group_id Group ID
100102
* @param timer_num Timer index in the group
101103
* @param en true to enable, false to disable
102104
*/
103-
static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en)
105+
static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en)
104106
{
105-
(void)hw;
107+
(void)group_id;
106108
(void)timer_num;
107109
(void)en;
108110
}

‎components/hal/esp32c2/include/hal/timer_ll.h‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -64,12 +64,13 @@ static inline void _timer_ll_reset_register(int group_id)
6464
/**
6565
* @brief Set clock source for timer
6666
*
67-
* @param hw Timer Group register base address
67+
* @param group_id Group ID
6868
* @param timer_num Timer number in the group
6969
* @param clk_src Clock source
7070
*/
71-
static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src)
71+
static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src)
7272
{
73+
timg_dev_t *hw = TIMER_LL_GET_HW(group_id);
7374
switch (clk_src) {
7475
case GPTIMER_CLK_SRC_PLL_F40M:
7576
hw->hw_timer[timer_num].config.tx_use_xtal = 0;
@@ -86,13 +87,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num,
8687
/**
8788
* @brief Enable Timer Group (GPTimer) module clock
8889
*
89-
* @param hw Timer Group register base address
90+
* @param group_id Group ID
9091
* @param timer_num Timer index in the group
9192
* @param en true to enable, false to disable
9293
*/
93-
static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en)
94+
static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en)
9495
{
9596
(void)timer_num; // only one timer in the group
97+
timg_dev_t *hw = TIMER_LL_GET_HW(group_id);
9698
hw->regclk.timer_clk_is_active = en;
9799
}
98100

‎components/hal/esp32c3/include/hal/timer_ll.h‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -72,12 +72,13 @@ static inline void _timer_ll_reset_register(int group_id)
7272
/**
7373
* @brief Set clock source for timer
7474
*
75-
* @param hw Timer Group register base address
75+
* @param group_id Group ID
7676
* @param timer_num Timer number in the group
7777
* @param clk_src Clock source
7878
*/
79-
static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src)
79+
static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src)
8080
{
81+
timg_dev_t *hw = TIMER_LL_GET_HW(group_id);
8182
switch (clk_src) {
8283
case GPTIMER_CLK_SRC_APB:
8384
hw->hw_timer[timer_num].config.tx_use_xtal = 0;
@@ -94,13 +95,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num,
9495
/**
9596
* @brief Enable Timer Group (GPTimer) module clock
9697
*
97-
* @param hw Timer Group register base address
98+
* @param group_id Group ID
9899
* @param timer_num Timer index in the group
99100
* @param en true to enable, false to disable
100101
*/
101-
static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en)
102+
static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en)
102103
{
103104
(void)timer_num; // only one timer in the group
105+
timg_dev_t *hw = TIMER_LL_GET_HW(group_id);
104106
hw->regclk.timer_clk_is_active = en;
105107
}
106108

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