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Jiang Jiang Jian
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Merge branch 'feat/esp32h21_system_sleep_cpu' into 'master'
Stage 4: Support esp32h21 CPU domain power down and retention Closes PM-351 See merge request espressif/esp-idf!37510
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‎components/esp_hw_support/lowpower/port/esp32h21/rvsleep-frames.h‎

Lines changed: 194 additions & 0 deletions
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __RVSLEEP_FRAMES_H__
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#define __RVSLEEP_FRAMES_H__
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#include "sdkconfig.h"
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/* Align a value up to nearest n-byte boundary, where n is a power of 2. */
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#define ALIGNUP(n, val) (((val) + (n) - 1) & -(n))
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#ifdef STRUCT_BEGIN
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#undef STRUCT_BEGIN
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#undef STRUCT_FIELD
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#undef STRUCT_AFIELD
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#undef STRUCT_END
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#endif
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#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
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#ifdef __clang__
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#define STRUCT_BEGIN .set RV_STRUCT_OFFSET, 0
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#define STRUCT_FIELD(ctype,size,asname,name) .set asname, RV_STRUCT_OFFSET; .set RV_STRUCT_OFFSET, asname + size
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#define STRUCT_AFIELD(ctype,size,asname,name,n) .set asname, RV_STRUCT_OFFSET;\
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.set RV_STRUCT_OFFSET, asname + (size)*(n);
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#define STRUCT_END(sname) .set sname##Size, RV_STRUCT_OFFSET;
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#else // __clang__
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#define STRUCT_BEGIN .pushsection .text; .struct 0
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#define STRUCT_FIELD(ctype,size,asname,name) asname: .space size
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#define STRUCT_AFIELD(ctype,size,asname,name,n) asname: .space (size)*(n)
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#define STRUCT_END(sname) sname##Size:; .popsection
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#endif // __clang__
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#else
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#define STRUCT_BEGIN typedef struct {
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#define STRUCT_FIELD(ctype,size,asname,name) ctype name;
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#define STRUCT_AFIELD(ctype,size,asname,name,n) ctype name[n];
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#define STRUCT_END(sname) } sname;
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#endif
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/*
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* -------------------------------------------------------------------------------
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* RISC-V CORE CRITICAL REGISTER CONTEXT LAYOUT FOR SLEEP
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* -------------------------------------------------------------------------------
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*/
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STRUCT_BEGIN
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MEPC, mepc) /* Machine Exception Program Counter */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_RA, ra) /* Return address */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_SP, sp) /* Stack pointer */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_GP, gp) /* Global pointer */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_TP, tp) /* Thread pointer */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_T0, t0) /* Temporary/alternate link register */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_T1, t1) /* t1-2: Temporaries */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_T2, t2)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S0, s0) /* Saved register/frame pointer */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S1, s1) /* Saved register */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A0, a0) /* a0-1: Function arguments/return address */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A1, a1)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A2, a2) /* a2-7: Function arguments */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A3, a3)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A4, a4)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A5, a5)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A6, a6)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_A7, a7)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S2, s2) /* s2-11: Saved registers */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S3, s3)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S4, s4)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S5, s5)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S6, s6)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S7, s7)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S8, s8)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S9, s9)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S10, s10)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_S11, s11)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_T3, t3) /* t3-6: Temporaries */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_T4, t4)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_T5, t5)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_T6, t6)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MSTATUS, mstatus) /* Machine Status */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVEC, mtvec) /* Machine Trap-Vector Base Address */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MCAUSE, mcause) /* Machine Trap Cause */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVAL, mtval) /* Machine Trap Value */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MIE, mie) /* Machine intr enable */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MIP, mip) /* Machine intr pending */
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMUFUNC, pmufunc) /* A field is used to identify whether it is going
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* to sleep or has just been awakened. We use the
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* lowest 2 bits as indication information, 3 means
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* being awakened, 1 means going to sleep */
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#if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME
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STRUCT_FIELD (long, 4, RV_SLP_CSF_CTX_CRC, frame_crc) /* Used to check RvCoreCriticalSleepFrame integrity */
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#endif
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STRUCT_END(RvCoreCriticalSleepFrame)
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#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
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#define RV_SLEEP_CTX_SZ1 RvCoreCriticalSleepFrameSize
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#else
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#define RV_SLEEP_CTX_SZ1 sizeof(RvCoreCriticalSleepFrame)
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#endif
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/*
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* Sleep stack frame size, after align up to 16 bytes boundary
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*/
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#define RV_SLEEP_CTX_FRMSZ (ALIGNUP(0x10, RV_SLEEP_CTX_SZ1))
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/*
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* -------------------------------------------------------------------------------
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* RISC-V CORE NON-CRITICAL REGISTER CONTEXT LAYOUT FOR SLEEP
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* -------------------------------------------------------------------------------
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*/
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STRUCT_BEGIN
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MSCRATCH, mscratch)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MIDELEG, mideleg)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MISA, misa)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_TSELECT, tselect)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_TDATA1, tdata1)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_TDATA2, tdata2)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_TCONTROL, tcontrol)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR0, pmpaddr0)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR1, pmpaddr1)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR2, pmpaddr2)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR3, pmpaddr3)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR4, pmpaddr4)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR5, pmpaddr5)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR6, pmpaddr6)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR7, pmpaddr7)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR8, pmpaddr8)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR9, pmpaddr9)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR10, pmpaddr10)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR11, pmpaddr11)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR12, pmpaddr12)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR13, pmpaddr13)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR14, pmpaddr14)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPADDR15, pmpaddr15)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPCFG0, pmpcfg0)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPCFG1, pmpcfg1)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPCFG2, pmpcfg2)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMPCFG3, pmpcfg3)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR0, pmaaddr0)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR1, pmaaddr1)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR2, pmaaddr2)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR3, pmaaddr3)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR4, pmaaddr4)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR5, pmaaddr5)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR6, pmaaddr6)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR7, pmaaddr7)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR8, pmaaddr8)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR9, pmaaddr9)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR10, pmaaddr10)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR11, pmaaddr11)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR12, pmaaddr12)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR13, pmaaddr13)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR14, pmaaddr14)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMAADDR15, pmaaddr15)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG0, pmacfg0)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG1, pmacfg1)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG2, pmacfg2)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG3, pmacfg3)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG4, pmacfg4)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG5, pmacfg5)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG6, pmacfg6)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG7, pmacfg7)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG8, pmacfg8)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG9, pmacfg9)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG10, pmacfg10)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG11, pmacfg11)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG12, pmacfg12)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG13, pmacfg13)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG14, pmacfg14)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_PMACFG15, pmacfg15)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UTVEC, utvec)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_USTATUS, ustatus)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UEPC, uepc)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UCAUSE, ucause)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MPCER, mpcer)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MPCMR, mpcmr)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_MPCCR, mpccr)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_CPU_TESTBUS_CTRL, cpu_testbus_ctrl)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UPCER, upcer)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UPCMR, upcmr)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UPCCR, upccr)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UGPIO_OEN, ugpio_oen)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UGPIO_IN, ugpio_in)
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STRUCT_FIELD (long, 4, RV_SLP_CTX_UGPIO_OUT, ugpio_out)
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#if CONFIG_PM_CHECK_SLEEP_RETENTION_FRAME
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STRUCT_FIELD (long, 4, RV_SLP_NCSF_CTX_CRC, frame_crc) /* Used to check RvCoreNonCriticalSleepFrame integrity */
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#endif
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STRUCT_END(RvCoreNonCriticalSleepFrame)
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#endif /* #ifndef __RVSLEEP_FRAMES_H__ */

‎components/esp_hw_support/lowpower/port/esp32h21/sleep_clock.c‎

Lines changed: 127 additions & 0 deletions
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_private/sleep_clock.h"
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#include "soc/i2c_ana_mst_reg.h"
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#include "soc/regi2c_defs.h"
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#include "soc/pcr_reg.h"
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#include "soc/regi2c_defs.h"
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#include "modem/modem_syscon_reg.h"
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#include "modem/modem_lpcon_reg.h"
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static const char *TAG = "sleep_clock";
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esp_err_t sleep_clock_system_retention_init(void *arg)
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{
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#define N_REGS_PCR() (((PCR_PWDET_SAR_CLK_CONF_REG - DR_REG_PCR_BASE) / 4) + 1)
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const static sleep_retention_entries_config_t pcr_regs_retention[] = {
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/* Enable i2c master clock */
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[0] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(0), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = ENTRY(0) },
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/* Start BBPLL self-calibration */
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[1] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(1), I2C_MST_ANA_CONF0_REG, 0, I2C_MST_BBPLL_STOP_FORCE_HIGH, 1, 0), .owner = ENTRY(0) },
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[2] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(2), I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_LOW, I2C_MST_BBPLL_STOP_FORCE_LOW, 1, 0), .owner = ENTRY(0) },
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/* Wait calibration done */
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[3] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(3), I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_CAL_DONE, I2C_MST_BBPLL_CAL_DONE, 1, 0), .owner = ENTRY(0) },
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/* Stop BBPLL self-calibration */
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[4] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(4), I2C_MST_ANA_CONF0_REG, 0, I2C_MST_BBPLL_STOP_FORCE_LOW, 1, 0), .owner = ENTRY(0) },
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[5] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(5), I2C_MST_ANA_CONF0_REG, I2C_MST_BBPLL_STOP_FORCE_HIGH, I2C_MST_BBPLL_STOP_FORCE_HIGH, 1, 0), .owner = ENTRY(0) },
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/* Clock configuration retention */
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[6] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PCR_LINK(6), DR_REG_PCR_BASE, DR_REG_PCR_BASE, N_REGS_PCR(), 0, 0), .owner = ENTRY(0) | ENTRY(2) },
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[7] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PCR_LINK(7), PCR_RESET_EVENT_BYPASS_REG, PCR_RESET_EVENT_BYPASS_REG, 1, 0, 0), .owner = ENTRY(0) | ENTRY(2) },
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[8] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_PCR_LINK(8), PCR_BUS_CLK_UPDATE_REG, PCR_BUS_CLOCK_UPDATE, PCR_BUS_CLOCK_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) },
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[9] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PCR_LINK(9), PCR_BUS_CLK_UPDATE_REG, 0x0, PCR_BUS_CLOCK_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) },
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};
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esp_err_t err = sleep_retention_entries_create(pcr_regs_retention, ARRAY_SIZE(pcr_regs_retention), REGDMA_LINK_PRI_SYS_CLK, SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
41+
ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for system (PCR) retention");
42+
ESP_LOGI(TAG, "System Power, Clock and Reset sleep retention initialization");
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return ESP_OK;
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#undef N_REGS_PCR
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}
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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esp_err_t sleep_clock_modem_retention_init(void *arg)
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{
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#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
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#define N_REGS_LPCON() (((MODEM_LPCON_MEM_CONF_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1)
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const static sleep_retention_entries_config_t modem_regs_retention[] = {
55+
[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(0), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, N_REGS_SYSCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */
56+
#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
57+
[1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMLPCON_LINK(0), MODEM_LPCON_TEST_CONF_REG, MODEM_LPCON_TEST_CONF_REG, N_REGS_LPCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) } /* MODEM LPCON */
58+
#endif
59+
};
60+
61+
esp_err_t err = sleep_retention_entries_create(modem_regs_retention, ARRAY_SIZE(modem_regs_retention), REGDMA_LINK_PRI_MODEM_CLK, SLEEP_RETENTION_MODULE_CLOCK_MODEM);
62+
ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (SYSCON) retention, 1 level priority");
63+
ESP_LOGI(TAG, "Modem Power, Clock and Reset sleep retention initialization");
64+
return ESP_OK;
65+
66+
#undef N_REGS_LPCON
67+
#undef N_REGS_SYSCON
68+
}
69+
#endif
70+
71+
bool clock_domain_pd_allowed(void)
72+
{
73+
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
74+
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
75+
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
76+
77+
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
78+
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
79+
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
80+
* or off. The clock and reset of digital peripherals are managed through
81+
* PCR, with TOP domain similar to MODEM domain. */
82+
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
83+
#if SOC_BT_SUPPORTED
84+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
85+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
86+
#endif
87+
#if SOC_IEEE802154_SUPPORTED
88+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
89+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
90+
#endif
91+
92+
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
93+
94+
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
95+
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
96+
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
97+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
98+
}
99+
#if SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
100+
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
101+
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
102+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
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}
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#endif
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const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
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const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
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return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
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}
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ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
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{
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sleep_retention_module_init_param_t init_param = {
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.cbs = { .create = { .handle = sleep_clock_system_retention_init, .arg = NULL } },
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.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
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};
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM, &init_param);
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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init_param = (sleep_retention_module_init_param_t) {
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.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
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.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
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};
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);
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#endif
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return ESP_OK;
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}

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