fix(esp32h21): use correct ROM addresses for libc functions

[erhankur]

• Fixed ESP32-H21 stub hang during flash write operations caused by memcpy, memmove, memcmp, strcpy, strncpy, strcmp, and strncmp being linked to inaccesable addresses (0x4fc0xxxx)
• Updated esp32h21.rom.libc.ld to use the correct addresses (0x4000xxxx) matching ESP-IDF's esp32h21.rom.libc-suboptimal_for_misaligned_mem.ld

[github-actions]

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👋 Hello erhankur, we appreciate your contribution to this project!

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Pull request overview

This PR fixes a critical bug in ESP32-H21 ROM linker script that caused the stub to hang during flash write operations. The issue was caused by incorrect ROM addresses (0x4fc0xxxx) being used for seven libc functions (memcpy, memmove, memcmp, strcpy, strncpy, strcmp, strncmp), which were inaccessible. The PR updates these to the correct 0x4000xxxx address space, matching the pattern used by other similar RISC-V targets like ESP32-H2 and ESP32-C6.

Changes:

• Updated 7 ROM libc function addresses in esp32h21.rom.libc.ld from inaccessible 0x4fc0xxxx range to correct 0x4000xxxx range
• Maintained proper 4-byte sequential address increments consistent with other targets
• Aligned ESP32-H21 ROM addresses with ESP-IDF's esp32h21.rom.libc-suboptimal_for_misaligned_mem.ld specification

[dobairoland]

LGTM

[erhankur]

@Dzarda7 @radimkarnis Not sure if you see any issue with H21 tests but this looks like a critical fix. fyi..

[Dzarda7]

Thanks for letting us know, we do not support H21 yet, you can see supported targets here, that is why we did not notice. There might be more issues with it as I added its support based on what was available at that time, sorry.

Also C61 does not support large flash mode yet, but it will be resolved, I need to put 32MB flash on the devkit.