@@ -228,13 +228,13 @@ wire [31:0] crc_next;
228228 assign gmii_rx_er_d3_out = gmii_rx_er_d3;
229229 assign gmii_rx_er_d4_out= gmii_rx_er_d4;
230230
231- assign m_axis_tdata_reg_out = m_axis_tdata_reg;
231+ assign m_axis_tdata_reg_out = m_axis_tdata_reg[ 4 ] ;
232232 assign m_axis_tdata_next_out = m_axis_tdata_next;
233- assign m_axis_tvalid_reg_out = m_axis_tvalid_reg;
233+ assign m_axis_tvalid_reg_out = m_axis_tvalid_reg[ 4 ] ;
234234 assign m_axis_tvalid_next_out = m_axis_tvalid_next;
235- assign m_axis_tlast_reg_out = m_axis_tlast_reg;
235+ assign m_axis_tlast_reg_out = m_axis_tlast_reg[ 4 ] ;
236236 assign m_axis_tlast_next_out = m_axis_tlast_next;
237- assign m_axis_tuser_reg_out = m_axis_tuser_reg;
237+ assign m_axis_tuser_reg_out = m_axis_tuser_reg[ 4 ] ;
238238 assign m_axis_tuser_next_out = m_axis_tuser_next;
239239
240240 assign start_packet_int_reg_out = start_packet_int_reg;
@@ -257,70 +257,6 @@ wire [31:0] crc_next;
257257 */
258258 assign cfg_rx_enable_out = gmii_rx_dv;
259259
260-
261-
262- // debug out
263-
264-
265- assign state_reg_out = state_reg;
266- assign state_next_out = state_next;
267- assign reset_crc_out = reset_crc;
268- assign update_crc_out = update_crc;
269-
270- assign mii_odd_out = mii_odd ;
271- assign in_frame_out = in_frame;
272-
273- assign gmii_rxd_d0_out = gmii_rxd_d0;
274- assign gmii_rxd_d1_out = gmii_rxd_d1;
275- assign gmii_rxd_d2_out = gmii_rxd_d2;
276- assign gmii_rxd_d3_out = gmii_rxd_d3;
277- assign gmii_rxd_d4_out = gmii_rxd_d4;
278-
279- assign gmii_rx_dv_d0_out = gmii_rx_dv_d0;
280- assign gmii_rx_dv_d1_out = gmii_rx_dv_d1;
281- assign gmii_rx_dv_d2_out = gmii_rx_dv_d2;
282- assign gmii_rx_dv_d3_out = gmii_rx_dv_d3;
283- assign gmii_rx_dv_d4_out = gmii_rx_dv_d4;
284-
285- assign gmii_rx_er_d0_out = gmii_rx_er_d0;
286- assign gmii_rx_er_d1_out = gmii_rx_er_d1;
287- assign gmii_rx_er_d2_out = gmii_rx_er_d2;
288- assign gmii_rx_er_d3_out = gmii_rx_er_d3;
289- assign gmii_rx_er_d4_out= gmii_rx_er_d4;
290-
291- assign m_axis_tdata_reg_out = m_axis_tdata_reg;
292- assign m_axis_tdata_next_out = m_axis_tdata_next;
293- assign m_axis_tvalid_reg_out = m_axis_tvalid_reg;
294- assign m_axis_tvalid_next_out = m_axis_tvalid_next;
295- assign m_axis_tlast_reg_out = m_axis_tlast_reg;
296- assign m_axis_tlast_next_out = m_axis_tlast_next;
297- assign m_axis_tuser_reg_out = m_axis_tuser_reg;
298- assign m_axis_tuser_next_out = m_axis_tuser_next;
299-
300- assign start_packet_int_reg_out = start_packet_int_reg;
301- assign start_packet_reg_out = start_packet_reg;
302- assign error_bad_frame_reg_out = error_bad_frame_reg;
303- assign error_bad_frame_next_out = error_bad_frame_next;
304- assign error_bad_fcs_reg_out = error_bad_fcs_reg;
305- assign error_bad_fcs_next_out = error_bad_fcs_next;
306-
307- assign ptp_ts_reg_out = ptp_ts_reg;
308-
309- assign crc_state_out = crc_state;
310- assign crc_next_out = crc_next;
311-
312- assign clk_enable_out = clk_enable;
313- assign mii_select_out = rst;
314-
315- /*
316- * Configuration
317- */
318- assign cfg_rx_enable_out = gmii_rx_dv;
319-
320-
321-
322-
323-
324260assign m_axis_tdata = m_axis_tdata_reg[4 ];
325261assign m_axis_tvalid = m_axis_tvalid_reg[4 ] & ~ (| m_axis_tlast_reg[4 :1 ]);
326262assign m_axis_tlast = m_axis_tlast_reg[0 ];
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