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1 parent 5f8ece0 commit 4bfa6e7Copy full SHA for 4bfa6e7
rtl/axis_gmii_tx.v
@@ -93,10 +93,9 @@ module axis_gmii_tx #
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// Debug ports
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output clk_out,
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- output wire [DATA_WIDTH-1:0] s_axis_tdata_out,
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- output wire s_axis_tvalid_out,
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- output wire s_axis_tready_out,
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- output wire s_axis_tlast_out,
+ output wire [DATA_WIDTH-1:0] tdata_out,
+ output wire talid_out,
+ output wire last_out,
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output wire clk_enable_out,
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output wire mii_select_out,
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output wire cfg_tx_enable_out,
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