@@ -178,7 +178,7 @@ reg gmii_rx_er_d2 = 1'b0;
178178reg gmii_rx_er_d3 = 1'b0 ;
179179reg gmii_rx_er_d4 = 1'b0 ;
180180
181- reg [DATA_WIDTH- 1 :0 ] m_axis_tdata_reg [ 4 : 0 ] ;
181+ reg [( 5 * DATA_WIDTH) - 1 :0 ] m_axis_tdata_reg;
182182reg [DATA_WIDTH- 1 :0 ] m_axis_tdata_next;
183183reg [4 :0 ] m_axis_tvalid_reg = 5'b0 ;
184184reg m_axis_tvalid_next;
@@ -228,7 +228,7 @@ wire [31:0] crc_next;
228228 assign gmii_rx_er_d3_out = gmii_rx_er_d3;
229229 assign gmii_rx_er_d4_out= gmii_rx_er_d4;
230230
231- assign m_axis_tdata_reg_out = m_axis_tdata_reg[4 ];
231+ assign m_axis_tdata_reg_out = m_axis_tdata_reg[( 5 * DATA_WIDTH) - 1 :( 4 * DATA_WIDTH) ];
232232 assign m_axis_tdata_next_out = m_axis_tdata_next;
233233 assign m_axis_tvalid_reg_out = m_axis_tvalid_reg[4 ];
234234 assign m_axis_tvalid_next_out = m_axis_tvalid_next;
@@ -257,7 +257,7 @@ wire [31:0] crc_next;
257257 */
258258 assign cfg_rx_enable_out = gmii_rx_dv;
259259
260- assign m_axis_tdata = m_axis_tdata_reg[4 ];
260+ assign m_axis_tdata = m_axis_tdata_reg[( 5 * DATA_WIDTH) - 1 :( 4 * DATA_WIDTH) ];
261261assign m_axis_tvalid = m_axis_tvalid_reg[4 ] & ~ (| m_axis_tlast_reg[4 :1 ]);
262262assign m_axis_tlast = m_axis_tlast_reg[0 ];
263263assign m_axis_tuser = PTP_TS_ENABLE ? {ptp_ts_reg, m_axis_tuser_reg[4 ]} : m_axis_tuser_reg[4 ];
364364always @(posedge clk) begin
365365 state_reg <= state_next;
366366
367- m_axis_tdata_reg <= {m_axis_tdata_reg[3 :0 ],m_axis_tdata_next};
367+ m_axis_tdata_reg <= {m_axis_tdata_reg[( 4 * DATA_WIDTH) - 1 :0 ],m_axis_tdata_next};
368368 m_axis_tvalid_reg <= {m_axis_tvalid_reg[3 :0 ],m_axis_tvalid_next};
369369 m_axis_tlast_reg <= {m_axis_tlast_reg[3 :0 ],m_axis_tlast_next};
370370 m_axis_tuser_reg <= {m_axis_tuser_reg[3 :0 ],m_axis_tuser_next};
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