Changing OMTF DT inputs to simDtTriggerPrimitiveDigis and fixing simDtTriggerPrimitiveDigis input

(cherry picked from commit 1479a29)

Author: eyigitba

L1Trigger/Configuration/python/customiseReEmul.py

@@ -61,7 +61,7 @@ def L1TReEmulFromRAW2015(process):
         cms.InputTag('hcalDigis')
     )
     process.L1TReEmul = cms.Sequence(process.simEcalTriggerPrimitiveDigis * process.simHcalTriggerPrimitiveDigis * process.SimL1Emulator)
-    process.simDtTriggerPrimitiveDigis.digiTag = 'muonDTDigis'  
+    process.simDtTriggerPrimitiveDigis.digiTag = 'muonDTDigis'
     process.simCscTriggerPrimitiveDigis.CSCComparatorDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCComparatorDigi')
     process.simCscTriggerPrimitiveDigis.CSCWireDigiProducer       = cms.InputTag( 'muonCSCDigis', 'MuonCSCWireDigi' )  
 
@@ -131,6 +131,7 @@ def L1TReEmulFromRAW2016(process):
                 cms.InputTag('hcalDigis'),
                 cms.InputTag('hcalDigis')
     )
+    process.simDtTriggerPrimitiveDigis.digiTag = cms.InputTag("muonDTDigis")
     process.simCscTriggerPrimitiveDigis.CSCComparatorDigiProducer = cms.InputTag( 'muonCSCDigis', 'MuonCSCComparatorDigi')
     process.simCscTriggerPrimitiveDigis.CSCWireDigiProducer       = cms.InputTag( 'muonCSCDigis', 'MuonCSCWireDigi' )  
     process.L1TReEmul = cms.Sequence(process.simEcalTriggerPrimitiveDigis * process.simHcalTriggerPrimitiveDigis * process.SimL1Emulator)
@@ -265,8 +266,8 @@ def L1TReEmulMCFromRAW(process):
     # Temporary fix for OMTF inputs in MC re-emulation
     run3_GEM.toModify(process.simOmtfDigis,
         srcRPC   = 'muonRPCDigis',
-        srcDTPh  = 'bmtfDigis',
-        srcDTTh  = 'bmtfDigis'
+        srcDTPh  = 'simDtTriggerPrimitiveDigis',
+        srcDTTh  = 'simDtTriggerPrimitiveDigis'
     )
 
     return process