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Description
This attempts to create an oneAPI accelerator backend based on #1246, leaving the standard oneAPI backend largely unchanged. The oneAPI Accelerator backend
Sideband Signal Support
Utilizes
whileloop for always-on kernel execution.sop/eopsideband signals for synchronization.io_parallelmode, the while loop is added to the main kernel code,myproject.cpp.io_streammode, wrapper layers,SidebandExtractionandSidebandMerging, are added to handle the sideband signals at the beginning and end of the loop. The standard layers remain unchanged, and they do not use sideband signals. The sidebands are passed directly from theSidebandExtractionto theSidebandMerginglayers via a separate pipe. This is an overhead, though the pipe payload is only 2-bits wide, to try to minimize the overhead.Added DMA Kernels for Hardware Execution
DMA-based data movement for improved memory transfer:
DMA_convert_dataandDMA_convert_data_backmove data between host and FPGA efficiently.Modification to the way that testbench starts
Modification to the way that python bridge under way (but not yet complete). It uses the three kernels as above, including the DMA transfers. However, at the moment the compilation is still software emulation only, and the function calls are for one input set at a time. Support will be added to be able to call the function with a sequence of inputs and to compile the bridge to run on hardware.
Utility Functions for Compile-Time Type Extraction
Type of change
Tests
This is still in progress, not automated. We should make sure we do not break other tests, though.
Checklist
pre-commiton the files I edited or added.