1+ /**
2+ *
3+ * \file ipc_utils.h
4+ *
5+ * \brief A bunch of util routines that helps on apipc implementattion.
6+ *
7+ * \author Federico David Ceccarelli
8+ *
9+ */
110
211#ifndef __IPC_UTILS_H__
312#define __IPC_UTILS_H__
716#include <stddef.h>
817#include <stdint.h>
918
19+ /**
20+ * \brief ipc's free-running counter wait ticks definitions.
21+ *
22+ * A 64-bit free-running counter is present in the device and it could be used
23+ * to measure time between actions.
24+ * The IPC_TIMER_WAIT_xxxmS defines interval times in PLLSYSCLK clock ticks.
25+ */
1026#if CPU_FRQ_200MHZ
11- #define IPC_TIMER_WAIT_1mS 200000ll
12- #define IPC_TIMER_WAIT_2mS 400000ll
13- #define IPC_TIMER_WAIT_5mS 1000000ll
14- #define IPC_TIMER_WAIT_10mS 2000000ll
15- #define IPC_TIMER_WAIT_20mS 4000000ll
16- #define IPC_TIMER_WAIT_50mS 50000000ll
17- #define IPC_TIMER_WAIT_100mS 20000000ll
18- #define IPC_TIMER_WAIT_200mS 40000000ll
19- #define IPC_TIMER_WAIT_500mS 100000000ll
20- #define IPC_TIMER_WAIT_1S 200000000ll
21- #define IPC_TIMER_WAIT_2S 400000000ll
22- #define IPC_TIMER_WAIT_5S 1000000000ll
23- #define IPC_TIMER_WAIT_10S 2000000000ll
27+ #define IPC_TIMER_WAIT_1mS 200000ll /**< 200000 PLLSYSCLK ticks == 1mS */
28+ #define IPC_TIMER_WAIT_2mS 400000ll /**< 400000 PLLSYSCLK ticks == 2mS */
29+ #define IPC_TIMER_WAIT_5mS 1000000ll /**< 1000000 PLLSYSCLK ticks == 5mS */
30+ #define IPC_TIMER_WAIT_10mS 2000000ll /**< 2000000 PLLSYSCLK ticks == 10mS */
31+ #define IPC_TIMER_WAIT_20mS 4000000ll /**< 4000000 PLLSYSCLK ticks == 20mS */
32+ #define IPC_TIMER_WAIT_50mS 50000000ll /**< 50000000 PLLSYSCLK ticks == 50mS */
33+ #define IPC_TIMER_WAIT_100mS 20000000ll /**< 20000000 PLLSYSCLK ticks == 100mS */
34+ #define IPC_TIMER_WAIT_200mS 40000000ll /**< 40000000 PLLSYSCLK ticks == 200mS */
35+ #define IPC_TIMER_WAIT_500mS 100000000ll /**< 100000000 PLLSYSCLK ticks == 500mS */
36+ #define IPC_TIMER_WAIT_1S 200000000ll /**< 200000000 PLLSYSCLK ticks == 1S */
37+ #define IPC_TIMER_WAIT_2S 400000000ll /**< 400000000 PLLSYSCLK ticks == 2mS */
38+ #define IPC_TIMER_WAIT_5S 1000000000ll /**< 1000000000 PLLSYSCLK ticks == 5S */
39+ #define IPC_TIMER_WAIT_10S 2000000000ll /**< 2000000000 PLLSYSCLK ticks == 10S */
2440#endif
2541
2642/**
27- * @fn u16memcpy()
28- *
29- * @brief copies n uint16_t size memory blocks from s2 to s1
43+ * \brief Copies n uint16_t size memory blocks from s2 to s1
3044 *
31- * @ param [in] s1 void pointer to a memory destination
32- * @ param [in] s2 void pointer fto a memory destination
33- * @ param [in] n number of uint16_t size elements to copy
45+ * \ param [in] s1 void pointer to a memory destination
46+ * \ param [in] s2 void pointer to a memory destination
47+ * \ param [in] n number of uint16_t size elements to copy
3448 *
35- * @ return s1 value, NULL if fails
49+ * \ return s1 value, NULL if fails
3650 *
3751 * Copies n uint16_t size elements from the object pointed to by s2 into the
38- * object pointed to by s1. If copying takes place between objects that overlap,
39- * the behavior is undefined. If pointed elemets are not multiple of uint16_t
40- * behavior is undefined.
41- *
42- */
43- void * u16memcpy (void * __restrict s1 , const void * __restrict s2 , size_t n );
44-
45- /**
46- * @fn GSxM_acces()
47- *
48- * @brief Manage GSxM Ram memory access
49- *
50- * @param [in] ulMask specifies the 32-bit mask for the GSxMSEL RAM control
51- * register to indicate which GSx SARAM blocks is requesting
52- * master access to.
53- * @param [in] usMaster specifies whether the CPU1 or CPU2 are given master
54- * access to the GSx blocks.
52+ * object pointed to by s1.
5553 *
56- * This function will allow CPU1 configure master acces to R/W/Exe acces to
57- * the GSx SARAM block specified by the ulMask parameter for the usMaster CPU
58- * specified.
59- * The usMaster parameter can be either: IPC_GSX_CPU2_MASTER or
60- * IPC_GSX_CPU1_MASTER.
61- * The ulMask parameter can be any of the options: S0_ACCESS - S7_ACCESS.
54+ * \note If copying takes place between objects that overlaps, the behavior is
55+ * undefined.
56+ * \note If pointed elemets are not multiple of uint16_t behavior is undefined.
6257 */
63- void GSxM_Acces ( uint32_t ulMask , uint16_t usMaster );
58+ void * u16memcpy ( void * __restrict s1 , const void * __restrict s2 , size_t n );
6459
6560/**
66- * @fn ipc_read_timer
61+ * \brief Reads the current ipc free-running counter register value.
6762 *
68- * @brief Read the current IPC timer value.
69- *
70- * @return IPCCOUNTER H/L value
63+ * \return actual IPCCOUNTER H/L value
7164 *
7265 * A 64-bit free-running counter is present in the device and can be used to
7366 * timestamp IPC events between processors or timerize process.
@@ -77,23 +70,48 @@ void GSxM_Acces(uint32_t ulMask, uint16_t usMaster);
7770uint64_t ipc_read_timer (void );
7871
7972/**
80- * @fn ipc_timer_expired
81- *
82- * @brief Use ipc IPCCOUNTER register to function as timer for ipc applications.
73+ * \brief Use ipc free-running counter IPCCOUNTER register to function as a
74+ * timer.
8375 *
84- * @ param [in] start IPCCOUNTERH/L value at the time the timer is started. Value
76+ * \ param [in] start IPCCOUNTERH/L value at the time the timer was started. Value
8577 * should be preserved until timer expires.
86- * @ param [in] wait time timer will wait until expires in counts.
78+ * \ param [in] wait time timer will wait until expires in counts.
8779 *
88- * @ return 1 if timer have expired, 0 if not.
80+ * \ return 1 if timer have expired, 0 if not.
8981 *
90- * A 64-bit free-running counter is present in the device and can be used to
91- * timestamp IPC events between processors or timerize process.
92- * This function will read the current ipc IPCCOUNTERH/L register value and
93- * compares it to start time to check if wait time have been completed.
82+ * This function will read the current ipc free-running counter IPCCOUNTERH/L
83+ * register value and compares it to the provided start value to check if wait
84+ * time have been completed.
85+ * If the difference between actual IPCCOUNTERH/L value and the start value is
86+ * greater than wait value funtion will consider that time has expired and
87+ * return 1. If not will return 0 and it will have to be called again to check
88+ * if timer expired.
89+ * IPCCOUNTERH/L overflow and turn around have been taken in acount.
90+ *
9491 */
9592uint16_t ipc_timer_expired (uint64_t start , uint64_t wait );
9693
94+ #if defined(CPU1 )
95+ /**
96+ * \brief Manage GSxM Ram memory access
97+ *
98+ * \param [in] ulMask specifies the 32-bit mask for the GSxMSEL RAM control
99+ * register to indicate which GSx SARAM blocks is requesting
100+ * master access to.
101+ * \param [in] usMaster specifies whether the CPU1 or CPU2 are given master
102+ * access to the GSx blocks.
103+ *
104+ * This function will allow CPU1 configure master acces to R/W/Exe acces to
105+ * the GSx SARAM block specified by the ulMask parameter for the usMaster CPU
106+ * specified.
107+ * The usMaster parameter can be either: IPC_GSX_CPU2_MASTER or
108+ * IPC_GSX_CPU1_MASTER.
109+ * The ulMask parameter can be any of the options: S0_ACCESS - S7_ACCESS.
110+ */
111+ void GSxM_Acces (uint32_t ulMask , uint16_t usMaster );
112+
113+ #endif
114+
97115#endif
98116
99117//
0 commit comments