fix: NumSharingCache

Jonathan Woollett-Light · kalyazin · commit cd1ce9da5a2d · 2023-05-12T18:45:24.000+01:00
Corrects access within `update_extended_cache_topology_entry` to use
the bit range 14..26 to access the `NumSharingCache` field.

Signed-off-by: Jonathan Woollett-Light &lt;jcawl@amazon.co.uk&gt;
diff --git a/src/vmm/src/guest_config/x86_64/cpuid/amd/normalize.rs b/src/vmm/src/guest_config/x86_64/cpuid/amd/normalize.rs
@@ -327,7 +327,7 @@ impl super::AmdCpuid {
                     1 | 2 => {
                         // SAFETY: We know `cpus_per_core > 0` therefore this is always safe.
                         let sub = u32::from(cpus_per_core.checked_sub(1).unwrap());
-                        set_range(&mut subleaf.result.eax, 14..28, sub)
+                        set_range(&mut subleaf.result.eax, 14..26, sub)
                             .map_err(ExtendedCacheTopologyError::NumSharingCache)?;
                     }
                     // L3 Cache

Original file line number	Diff line number	Diff line change
`@@ -327,7 +327,7 @@ impl super::AmdCpuid {`
`327`	`327`	`1 \| 2 => {`
`328`	`328`	// SAFETY: We know `cpus_per_core > 0` therefore this is always safe.
`329`	`329`	`let sub = u32::from(cpus_per_core.checked_sub(1).unwrap());`
`330`		`- set_range(&mut subleaf.result.eax, 14..28, sub)`
	`330`	`+ set_range(&mut subleaf.result.eax, 14..26, sub)`
`331`	`331`	`.map_err(ExtendedCacheTopologyError::NumSharingCache)?;`
`332`	`332`	`}`
`333`	`333`	`// L3 Cache`