Skip to content

Upgrade dependencies and bump to 1.5.0 #30

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open

Upgrade dependencies and bump to 1.5.0 #30

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 3 additions & 3 deletions ni-fpga/Cargo.toml
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[package]
name = "ni-fpga"
version = "1.4.1"
version = "1.5.0"
authors = ["Connor Worley <[email protected]>"]
edition = "2018"
license = "MIT"
Expand All @@ -10,6 +10,6 @@ readme = "README.md"
repository = "https://github.com/first-rust-competition/ni-fpga-rs"

[dependencies]
bitvec = "0.17.4"
bitvec = "1.0.1"
ni-fpga-sys = { version = "1.0.1", path = "../ni-fpga-sys" }
thiserror = "1.0.19"
thiserror = "1.0.35"
6 changes: 3 additions & 3 deletions ni-fpga/src/datatype.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3,9 +3,9 @@ use bitvec::prelude::*;
use crate::errors::Error;

#[cfg(target_endian = "little")]
pub type FpgaBits = BitSlice<Msb0, u8>;
pub type FpgaBits = BitSlice<u8, Msb0>;
#[cfg(target_endian = "big")]
pub type FpgaBits = BitSlice<Lsb0, u8>;
pub type FpgaBits = BitSlice<u8, Lsb0>;

pub trait Datatype: Sized {
const SIZE_IN_BITS: usize;
Expand All @@ -20,7 +20,7 @@ impl<T: Datatype, const N: usize> Datatype for [T; N] {

fn pack(fpga_bits: &mut FpgaBits, data: &Self) -> Result<(), Error> {
data.iter()
.zip(fpga_bits.chunks_mut(T::SIZE_IN_BITS))
.zip(unsafe { fpga_bits.chunks_mut(T::SIZE_IN_BITS).remove_alias() })
.try_for_each(|(src, bits)| Datatype::pack(bits, src))
}

Expand Down