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feat:enable fp8 blockscale moe for fused cultass for sm90 #1819
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Signed-off-by: Duncan Moss <[email protected]>
Signed-off-by: Duncan Moss <[email protected]>
Summary of ChangesHello @djmmoss, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed! This pull request significantly enhances the Fused Cutlass Mixture-of-Experts (MoE) functionality by introducing FP8 Block Scaling capabilities, primarily for SM90 architectures. It integrates a sophisticated DeepGEMM JIT compilation system that dynamically generates and optimizes CUDA kernels for efficient FP8 GEMM operations. This allows for more flexible and performant FP8 computations in MoE layers, moving from a stub implementation to a full-fledged feature with comprehensive kernel support and updated build configurations. Highlights
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Code Review
This pull request introduces support for FP8 block scaling in fused Mixture-of-Experts (MoE) kernels for SM90 architectures, which is a significant feature enhancement. The implementation includes a new JIT compilation framework for CUDA kernels, the FP8 GEMM kernel implementations, and updates to the build system and tests. The code is generally well-structured, but I've identified a few issues that should be addressed to improve correctness and maintainability, including a bug in kernel name generation, an inconsistent function declaration, and a redundant loop.
std::to_string(num_groups) + "_" + std::to_string(num_stages) + | ||
std::to_string(num_groups) + "_" + std::to_string(num_stages) + "_" + |
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There is a duplication in the construction of the kernel name. The num_groups
and num_stages
parameters are appended twice. This appears to be a copy-paste error and will result in an incorrect and unnecessarily long kernel name, which could lead to caching issues.
std::to_string(num_groups) + "_" + std::to_string(num_stages) + "_" +
|
||
namespace deep_gemm { | ||
template <typename T> | ||
static CUtensorMap make_2d_tma_a_desc(T* global_address, uint32_t shape_m, uint32_t shape_k, |
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The function make_2d_tma_a_desc
is declared static
, while other similar helper functions in this file (e.g., make_2d_tma_b_desc
) are not. This is inconsistent. For function templates in header files, the static
keyword is generally not necessary and can be removed for consistency and adherence to modern C++ practices.
CUtensorMap make_2d_tma_a_desc(T* global_address, uint32_t shape_m, uint32_t shape_k,
for (int i = 0; i < num_problems; i++) { | ||
fp8_mat_b = reinterpret_cast<__nv_fp8_e4m3*>(const_cast<void*>(mat_b)); | ||
per_block_scales = const_cast<float*>(scales_b); | ||
} |
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This loop is redundant. It repeatedly assigns the same pointer values to fp8_mat_b
and per_block_scales
in each iteration. The loop can be removed and replaced with a single assignment to improve clarity and remove dead code.
fp8_mat_b = reinterpret_cast<__nv_fp8_e4m3*>(const_cast<void*>(mat_b));
per_block_scales = const_cast<float*>(scales_b);
Signed-off-by: Duncan Moss <[email protected]>
Signed-off-by: Duncan Moss <[email protected]>
flashinfer/jit/core.py
Outdated
"-O3", | ||
"-std=c++17", | ||
"-Wno-switch-bool", | ||
"-D__CUDACC_VER_MAJOR__=" + str(torch.version.cuda.split(".")[0]), |
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Why do we need this? They are nvcc native macros.
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When I was compiling, they weren't enabled in the JIT mode, I'm not sure it this was an environment issue, but I just installed the package with pip install -e .
in a fresh venv
. I believe it's because this is c++
instead of nvcc
?
E [2/3] c++ -MMD -MF fp4_quantization_90/fp4Op.o.d -DTORCH_EXTENSION_NAME=fp4_quantization_90 -DTORCH_API_INCLUDE_EXTENSION_H -DPy_LIMITED_API=0x03090000 -DPYBIND11_COMPILER_TYPE=\"_gcc\" -DPYBIND11_STDLIB=\"_libstdcpp\" -DPYBIND11_BUILD_ABI=\"_cxxabi1018\" -D_GLIBCXX_USE_CXX11_ABI=1 -I/home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal -I/home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal/include -isystem /usr/include/python3.10 -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/venv/lib/python3.10/site-packages/torch/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/venv/lib/python3.10/site-packages/torch/include/torch/csrc/api/include -isystem /home/scratch.svc_compute_arch/release/cuda_toolkit/internal/latest_r12.9/include -isystem /home/scratch.svc_compute_arch/release/cuda_toolkit/internal/latest_r12.9/include/cccl -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/3rdparty/cutlass/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/3rdparty/cutlass/tools/util/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/3rdparty/spdlog/include -fPIC -O3 -std=c++17 -Wno-switch-bool -DENABLE_BF16 -DENABLE_FP8 -DENABLE_FP4 -c /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal/tensorrt_llm/thop/fp4Op.cpp -o fp4_quantization_90/fp4Op.o
E FAILED: [code=1] fp4_quantization_90/fp4Op.o
E c++ -MMD -MF fp4_quantization_90/fp4Op.o.d -DTORCH_EXTENSION_NAME=fp4_quantization_90 -DTORCH_API_INCLUDE_EXTENSION_H -DPy_LIMITED_API=0x03090000 -DPYBIND11_COMPILER_TYPE=\"_gcc\" -DPYBIND11_STDLIB=\"_libstdcpp\" -DPYBIND11_BUILD_ABI=\"_cxxabi1018\" -D_GLIBCXX_USE_CXX11_ABI=1 -I/home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal -I/home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal/include -isystem /usr/include/python3.10 -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/venv/lib/python3.10/site-packages/torch/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/venv/lib/python3.10/site-packages/torch/include/torch/csrc/api/include -isystem /home/scratch.svc_compute_arch/release/cuda_toolkit/internal/latest_r12.9/include -isystem /home/scratch.svc_compute_arch/release/cuda_toolkit/internal/latest_r12.9/include/cccl -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/3rdparty/cutlass/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/3rdparty/cutlass/tools/util/include -isystem /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/3rdparty/spdlog/include -fPIC -O3 -std=c++17 -Wno-switch-bool -DENABLE_BF16 -DENABLE_FP8 -DENABLE_FP4 -c /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal/tensorrt_llm/thop/fp4Op.cpp -o fp4_quantization_90/fp4Op.o
E /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal/tensorrt_llm/thop/fp4Op.cpp: In function βat::Tensor torch_ext::mxfp4_dequantize_host(at::Tensor, at::Tensor, int64_t)β:
E /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal/tensorrt_llm/thop/fp4Op.cpp:405:44: error: β__CUDACC_VER_MAJOR__β was not declared in this scope
E 405 | std::cout << "Current CUDA version: " << __CUDACC_VER_MAJOR__ * 10000 + __CUDACC_VER_MINOR__ * 100 << std::endl;
E | ^~~~~~~~~~~~~~~~~~~~
E /home/scratch.dmoss_gpu_1/repos/squirtle/flashinfer/csrc/nv_internal/tensorrt_llm/thop/fp4Op.cpp:405:75: error: β__CUDACC_VER_MINOR__β was not declared in this scope
E 405 | std::cout << "Current CUDA version: " << __CUDACC_VER_MAJOR__ * 10000 + __CUDACC_VER_MINOR__ * 100 << std::endl;
E | ^~~~~~~~~~~~~~~~~~~~
E ninja: build stopped: subcommand failed.
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Yes c++ files will be compiled with gcc instead of nvcc.
Considering these file includes cuda headers, can we rename it to fp4Op.cu
instead?
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ah, this was actually fixed in different PR. I've removed this change
Signed-off-by: Duncan Moss <[email protected]>
Signed-off-by: Duncan Moss <[email protected]>
@yzh119 ready for final review |
@@ -0,0 +1,543 @@ | |||
/* |
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How are these implementations from https://github.com/deepseek-ai/DeepGEMM
We already have deepgemm kernels
- https://docs.flashinfer.ai/generated/flashinfer.gemm.batch_deepgemm_fp8_nt_groupwise.html
- https://docs.flashinfer.ai/generated/flashinfer.gemm.group_gemm_mxfp4_nt_groupwise.html
If there are not significant changes, we should unify them (maybe not in this PR).
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The tensorrt_llm/deep_gemm
files are generated here: https://github.com/NVIDIA/TensorRT-LLM/tree/main/cpp/tensorrt_llm/deep_gemm
I checked the deepgemm kernels that have already been integrated into flashinfer, currently they only seem to work on blackwell (this PR is for hopper). I can look in a follow-up PR into merging the two.
Signed-off-by: Duncan Moss <[email protected]>
Signed-off-by: Duncan Moss <[email protected]>
Signed-off-by: Duncan Moss <[email protected]>
Signed-off-by: Duncan Moss <[email protected]>
/run bot |
/bot run |
it is bot run @yzh119 :) |
π Description
Adds FP8 Block Scaling Fused Cutlass MoE for SM90.
β Pre-commit Checks
pre-commit
by runningpip install pre-commit
(or used your preferred method).pre-commit install
.pre-commit run --all-files
and fixed any reported issues.π§ͺ Tests
unittest
, etc.).Reviewer Notes